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Reseach Article

Prototyping of On-chip I2C Module for FPGA Spartan 3A Series using Verilog

by Ramandeep Singh, Neeraj Sharma
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 68 - Number 16
Year of Publication: 2013
Authors: Ramandeep Singh, Neeraj Sharma
10.5120/11665-7256

Ramandeep Singh, Neeraj Sharma . Prototyping of On-chip I2C Module for FPGA Spartan 3A Series using Verilog. International Journal of Computer Applications. 68, 16 ( April 2013), 33-37. DOI=10.5120/11665-7256

@article{ 10.5120/11665-7256,
author = { Ramandeep Singh, Neeraj Sharma },
title = { Prototyping of On-chip I2C Module for FPGA Spartan 3A Series using Verilog },
journal = { International Journal of Computer Applications },
issue_date = { April 2013 },
volume = { 68 },
number = { 16 },
month = { April },
year = { 2013 },
issn = { 0975-8887 },
pages = { 33-37 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume68/number16/11665-7256/ },
doi = { 10.5120/11665-7256 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T21:28:03.159623+05:30
%A Ramandeep Singh
%A Neeraj Sharma
%T Prototyping of On-chip I2C Module for FPGA Spartan 3A Series using Verilog
%J International Journal of Computer Applications
%@ 0975-8887
%V 68
%N 16
%P 33-37
%D 2013
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Today, at the low end of the communication protocols we find two worldwide standards: I2C and SPI [7]. I2C – commonly known as Inter IC, is a bus protocol. I2C protocol was proposed by Philips Semiconductors to enable faster device to communicate with slower devices without any data loss [1]. In this paper, we will assist the system designers to understand the communication between EEPROM (24C02) and FPGA Spartan 3A. The design is synthesized and simulated using Xilinx ISE and 7. 1 and 12. 4. Programmed FPGA acts as a master where as EEPROM acts as a Slave.

References
  1. P. Venkateswaran, Madhumita Mukherjee, Arindam Sanyal, Snehasish Das and R. Nandi. Design and Implementation of FPGA Based Interface Model for Scale-Free Network using I2C Bus Protocol on Quartus II 6. 0. 2009 International Conference on Computers and Devices for Communication
  2. Kangshun Li1,2, Yan Chen1 and Hezuan Liu2. A New Method of Evolving Hardware Design Based on IIC Bus and AT24C02. Proceedings of the 10th World Congress on Intelligent Control and Automation July 6-8, 2012, Beijing, China
  3. Peter Wilson,Du Sheng translate. Design and Practice Based on FPGA [M]. Beijing: Posts&Telecom Press. 2009. Jul.
  4. ST24C02, user manual by ST MICROELECTRONICS
  5. I2C-Bus Specification, Version 2. 1 January 2000
  6. Frederic Leens. An Introduction to I2C and SPI Protocols. IEEE Instrumentation & Measurement Magazine February 2009
  7. J. M. Irazabel & S. Blozis, Philips Semiconductors, "I2C Manual," Application Note, ref. AN10216-0, March 24, 2003.
  8. Abinesh R. Bharghava, M. B. Srinivas. Transition Inversion based Low Power Data Coding Scheme for Synchronous Serial Communication. 2009 IEEE Computer Society Annual Symposium on VLSI
  9. Seung-Hun Park, Doo-Hwan Bae. Tailoring a large-sized software process using process slicing and case-based reasoning technique. September 2012.
  10. Pasi Virtanen, Samuli Pekkola, Tero Päivärinta. Why SPI Initiative Failed: Contextual Factors and Changing Software Development Environment. 2013 46th Hawaii International Conference on System Sciences
  11. Manish Kumar Saxena, Ekansh Bhatnagar, Nitin Jaiswal,Milind Parab, Samir Nagesh Kulkarni. Reconfigurable Architecture for IP Peripherals. The International Conference on Signals and Electronics System Gliwice, Poland, September 7-10, 2010.
Index Terms

Computer Science
Information Sciences

Keywords

FPGA I2C Bus Verilog