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High Quality FPGA Optimized Random Number Generator
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 67 - Number 17 |
| Year of Publication: 2013 |
| Authors: V. Navya Deepthi, A. Ruhan Bevi, V. Sai Keerthi |
10.5120/11484-7186
|
V. Navya Deepthi, A. Ruhan Bevi, V. Sai Keerthi . High Quality FPGA Optimized Random Number Generator. International Journal of Computer Applications. 67, 17 ( April 2013), 1-4. DOI=10.5120/11484-7186
Abstract
In this paper we designed a new type of Random number generator by using shift registers and LUT with D-FF as input to it. The algorithm used to generate random numbers is realized using simple xor circuit and implemented on a Virtex II FPGA from Xilinx. This designed block indicate a good sequence of random numbers which is used in high-speed data processor, Testing Instruments, Finding Laser Range, Time-of-flight mass spectrometry experiments etc. The randomness of this type of RNG is tested using NIST statistical test and this method has produced good results.
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