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Survey on Various Types of Power in DLL
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 66 - Number 9 |
| Year of Publication: 2013 |
| Authors: Ranjana Kumari Mishra, Rajesh Nema, Teena Raikwar |
10.5120/11111-5619
|
Ranjana Kumari Mishra, Rajesh Nema, Teena Raikwar . Survey on Various Types of Power in DLL. International Journal of Computer Applications. 66, 9 ( March 2013), 11-14. DOI=10.5120/11111-5619
Abstract
A low power analysis of the jitter bounded is presented in this paper. Digital Delay Locked Loop (DLL) are commonly used for clock synchronization in modern ICs because of their superior stability and process portability. The DLL has a graduated course delay line and a phase interpolating fine delay line.
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