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Module based Partial Reconfiguration on Bitstream Relocation Filter
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 66 - Number 10 |
| Year of Publication: 2013 |
| Authors: M. Angelin Ponrani, G. Manoj, R. Rajesvari |
10.5120/11121-6083
|
M. Angelin Ponrani, G. Manoj, R. Rajesvari . Module based Partial Reconfiguration on Bitstream Relocation Filter. International Journal of Computer Applications. 66, 10 ( March 2013), 23-28. DOI=10.5120/11121-6083
Abstract
The concept of partial bit stream relocation activity, the run time relocation can be obtained by using a system component. It is able to update the bitstream information and moving the reconfigurable module to a desired position. In Dynamic partial reconfiguration, it provides the possibility to change certain parts of the hardware while the other parts of the system remain in use. It provides a methodology to generate bitstreams for removal of old hardware modules, and placement and routing of new hardware modules. Relocation filter is implemented as a software component. The data errors can be detected and corrected by using the cyclic redundancy check and it is then fed into a system. Reconfiguration process is done over here by keeping cyclic redundancy check as a static part and bitstream relocation filter as a reconfigurable one. Finally the area require to store the Bitstream is analysed. Using module based partial reconfiguration; we can dramatically increase the functionality of a single FPGA in terms of the memory that is used to store the bitstreams. Important applications for this technology include reconfigurable communication and cryptographic systems.
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