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Reseach Article

Modified Optimal Performance Mapping on Reconfigurable Architecture for Multimedia Applications

by V. Vidya Devi, Bharath Kumar
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 65 - Number 20
Year of Publication: 2013
Authors: V. Vidya Devi, Bharath Kumar
10.5120/11044-5481

V. Vidya Devi, Bharath Kumar . Modified Optimal Performance Mapping on Reconfigurable Architecture for Multimedia Applications. International Journal of Computer Applications. 65, 20 ( March 2013), 37-40. DOI=10.5120/11044-5481

@article{ 10.5120/11044-5481,
author = { V. Vidya Devi, Bharath Kumar },
title = { Modified Optimal Performance Mapping on Reconfigurable Architecture for Multimedia Applications },
journal = { International Journal of Computer Applications },
issue_date = { March 2013 },
volume = { 65 },
number = { 20 },
month = { March },
year = { 2013 },
issn = { 0975-8887 },
pages = { 37-40 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume65/number20/11044-5481/ },
doi = { 10.5120/11044-5481 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T21:19:23.647400+05:30
%A V. Vidya Devi
%A Bharath Kumar
%T Modified Optimal Performance Mapping on Reconfigurable Architecture for Multimedia Applications
%J International Journal of Computer Applications
%@ 0975-8887
%V 65
%N 20
%P 37-40
%D 2013
%I Foundation of Computer Science (FCS), NY, USA
Abstract

In this paper, Coarse-grained reconfigurable architectures (CGRAs) are capable of achieving both goals of high performance and flexibility. CGRAs not only improve performance by exploiting the features of repetitive computations, but also can adapt to diverse computations by dynamically changing configurations of an array of its internal processing elements (PEs) and their interconnections. This paper introduces approaches to mapping applications onto CGRAs supporting both integer and floating point arithmetic. After presenting an optimal formulation using integer linear programming, we present a fast heuristic mapping algorithm. Our experiments on randomly generated examples generate optimal mapping results using our heuristic algorithm for 97% through put. We observe similar results for practical examples from multimedia and 3-D graphics benchmarks. The applications mapped on a CGRA show up to 120 times performance improvement compared to software implementations, demonstrating the potential for application acceleration on CGRAs supporting floating-point operations. ISE Xiling 9. 1 version, Altra ModelSim SE 5. 7. was used to simulate and verify the results.

References
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Index Terms

Computer Science
Information Sciences

Keywords

Design automation high-level synthesis parallelizing compiler reconfigurable architecture. CGRAs P E