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Artificial Neural Network for Performance Modeling and Optimization of CMOS Analog Circuits
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 58 - Number 18 |
| Year of Publication: 2012 |
| Authors: Mriganka Chakraborty |
10.5120/9380-3731
|
Mriganka Chakraborty . Artificial Neural Network for Performance Modeling and Optimization of CMOS Analog Circuits. International Journal of Computer Applications. 58, 18 ( November 2012), 6-12. DOI=10.5120/9380-3731
Abstract
This paper presents an implementation of multilayer feed forward neural networks (NN) to optimize CMOS analog circuits. For modeling and design recently neural network computational modules have got acceptance as an unorthodox and useful tool. To achieve high performance of active or passive circuit component neural network can be trained accordingly. A well trained neural network can produce more accurate outcome depending on its learning capability. Neural network model can replace empirical modeling solutions limited by range and accuracy. [2] Neural network models are easy to obtain for new circuits or devices which can replace analytical methods. Numerical modeling methods can also be replaced by neural network model due to their computationally expansive behavior. [2][10][20]. The pro¬posed implementation is aimed at reducing resource requirement, without much compromise on the speed. The NN ensures proper func¬tioning by assigning the appropriate inputs, weights, biases, and excitation function of the layer that is currently being computed. The concept used is shown to be very effective in reducing resource requirements and enhancing speed.
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