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Study and Design of Low Power Quasi Adiabatic Cross Coupled Inverter
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 57 - Number 15 |
| Year of Publication: 2012 |
| Authors: Samik Samanta |
10.5120/9188-3609
|
Samik Samanta . Study and Design of Low Power Quasi Adiabatic Cross Coupled Inverter. International Journal of Computer Applications. 57, 15 ( November 2012), 6-10. DOI=10.5120/9188-3609
Abstract
Power dissipation has been a highly concerned issue in low power VLSI design. The classical approaches of reducing energy dissipation in conventional CMOS circuits include reducing the supply voltages, node capacitances and switching activities. Adiabatic switching technique based on energy recovery principle is one of the techniques to achieve low power VLSI design. In this paper the power dissipation of various adiabatic circuits is calculated using SPICE simulation tool. From the calculated results it has also been found that positive feedback adiabatic logic (PFAL) inverter exhibits minimum power dissipation among all the cross coupled adiabatic inverters. A new adiabatic family has been proposed by swapping NMOS and PMOS transistor of pull up network and pull down network and it has been shown that the new PFAL inverter has 33% less power dissipation than conventional PFAL inverter.
References
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