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Reseach Article

Design and Simulation of Multi Channel UART for Serial Communication

by N. B. S. Naveen, G. Rama Krishna
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 52 - Number 20
Year of Publication: 2012
Authors: N. B. S. Naveen, G. Rama Krishna
10.5120/8315-1771

N. B. S. Naveen, G. Rama Krishna . Design and Simulation of Multi Channel UART for Serial Communication. International Journal of Computer Applications. 52, 20 ( August 2012), 7-10. DOI=10.5120/8315-1771

@article{ 10.5120/8315-1771,
author = { N. B. S. Naveen, G. Rama Krishna },
title = { Design and Simulation of Multi Channel UART for Serial Communication },
journal = { International Journal of Computer Applications },
issue_date = { August 2012 },
volume = { 52 },
number = { 20 },
month = { August },
year = { 2012 },
issn = { 0975-8887 },
pages = { 7-10 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume52/number20/8315-1771/ },
doi = { 10.5120/8315-1771 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T20:52:44.209898+05:30
%A N. B. S. Naveen
%A G. Rama Krishna
%T Design and Simulation of Multi Channel UART for Serial Communication
%J International Journal of Computer Applications
%@ 0975-8887
%V 52
%N 20
%P 7-10
%D 2012
%I Foundation of Computer Science (FCS), NY, USA
Abstract

UART (Universal Asynchronous Receiver Transmitter) is used for serial communication. It is used for long distance and low cost process for transfer of data between pc and its devices. In general a UART operated with specific baud rate. To meet the complex communication demands it is not sufficient. To overcome this difficulty a multi channel UART is proposed in this paper. And the whole design is simulated with modelsim and synthesized with Xilinx software

References
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  2. FANG Yi-Yuan CHEN Xue-jun, "Design and Simulation of UART Serial Communication Module Based on VHDL" Shanghai University of Engineering Science, 2011
  3. Mohd Yamani Idna Idris, Zaidi Razak, " A VHDL Implementation of UART design with BIST capability", Malaysian Journal of Computer Science, vol. 19(1), 2006
  4. Vijay A. Nebhrajan, "Asynchronous FIFO Architectures", www. eebyte. com
  5. Frank Durda Serial and UART Tutorial. uhclem@FreeBSD. org
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  7. HU Hua, BAI Feng-e. " Design and Simulation of UART Serial Communication Module Based on Verilog HDL" [J]. J ISUANJI YUXIANDA IHUA 2008 Vol. 8
Index Terms

Computer Science
Information Sciences

Keywords

UART Baud rate generator First in First Out Simulation