We apologize for a recent technical issue with our email system, which temporarily affected account activations. Accounts have now been activated. Authors may proceed with paper submissions. PhDFocusTM
CFP last date
20 November 2024
Call for Paper
December Edition
IJCA solicits high quality original research papers for the upcoming December edition of the journal. The last date of research paper submission is 20 November 2024

Submit your paper
Know more
The week's pick
Responsive image
An Efficient Restoration Method for the Faint Dot Matrix Images

Ao Zhu Peng Cao
Random Articles
Reseach Article

Investigation of Fast Switched CMOS Inverter using 180nm VLSI Technology

by Navneet Kaur, Gurpurneet Kaur, Chahat Jain
journal cover thumbnail

International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 51 - Number 15
Year of Publication: 2012
Authors: Navneet Kaur, Gurpurneet Kaur, Chahat Jain
10.5120/8117-1740

Navneet Kaur, Gurpurneet Kaur, Chahat Jain . Investigation of Fast Switched CMOS Inverter using 180nm VLSI Technology. International Journal of Computer Applications. 51, 15 ( August 2012), 14-18. DOI=10.5120/8117-1740

@article{ 10.5120/8117-1740,
author = { Navneet Kaur, Gurpurneet Kaur, Chahat Jain },
title = { Investigation of Fast Switched CMOS Inverter using 180nm VLSI Technology },
journal = { International Journal of Computer Applications },
issue_date = { August 2012 },
volume = { 51 },
number = { 15 },
month = { August },
year = { 2012 },
issn = { 0975-8887 },
pages = { 14-18 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume51/number15/8117-1740/ },
doi = { 10.5120/8117-1740 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T20:50:28.121187+05:30
%A Navneet Kaur
%A Gurpurneet Kaur
%A Chahat Jain
%T Investigation of Fast Switched CMOS Inverter using 180nm VLSI Technology
%J International Journal of Computer Applications
%@ 0975-8887
%V 51
%N 15
%P 14-18
%D 2012
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Inverter is truly the nucleus of electronics industry. It is the main building block of everyday appliances i. e. microwaves, power tools, battery chargers, air conditioners and computers etc. In this paper, CMOS technology has been chosen to study the transient and dc characteristics of an inverter. Feature size is the main parameter to study the voltage transfer characteristics of inverter, for which length and width of transistors is varied. Further, CMOS inverters can be paralleled for increased power to drive higher current loads. Simulations are run on cadence design tool and the schematic diagrams are drawn in virtuoso schematic editor using 180nm technology file.

References
  1. Rabaey, J. M. and Pedram, M. 1996 Eds. , Low Power Design Methodologies. Norwell, MA: Kluwer.
  2. Rabaey J. M. 1996 Digital Integrated Circuits. Englewood Cliffs, NJ: Prentice-Hall.
  3. [CMOS Inverter] http://courseware. ee. calpoly. edu/~dbraun/courses/ee307/F02/02_Shelley/Section2_BasilShelley. htm.
  4. Singh A. K. 2009 Digital VLSI design,Asoke K. Ghosh: Prentice Hall of India.
  5. Rabaey J. M. , Chandrakasan A. P. , and Nikolic B. 2003 Digital Integrated Circuits, Pearson Education, 2nd edition.
  6. Ijjada S. R. , Kumar S. V. S, Reddy M. D. , Rahaman S. A. , and Rao V. M. 2011 Design of low power and high speed inverter, International Journal of Distributed and Parallel Systems (IJDPS), 2(5), pp. 127-135.
  7. [CMOS Inverter and Multiplexer] http://www. csse. monash. edu. au/courseware/cse3142/2006/Lnts/C03. pdf
  8. [Voltage Transfer Characteristics] http://en. wikipedia. org/wiki/Inverter_(logic_gate)
  9. [CMOS Inverter: V-I Characteristics] http://www. mims. mut. ac. th/amorn/courses/EEET0413_pdf/Lect4-Inv. pdf.
  10. [MOS Field Effect Transistors] http://ecee. colorado. edu/~bart/book/book/chapter7/ch7_6. htm#7_6_2.
  11. [Width to Length ratio] http://www. ece. ncsu. edu/asic/lect_NTU/CMOS2up. pdf
Index Terms

Computer Science
Information Sciences

Keywords

Subthreshold region Complementary Metal Oxide Semiconductor (CMOS) Feature size Design Rule Check (DRC) Layout Vs Schematic (LVS)

Powered by PhDFocusTM