International Journal of Computer Applications |
Foundation of Computer Science (FCS), NY, USA |
Volume 47 - Number 25 |
Year of Publication: 2012 |
Authors: Arash Nosrat, Yousef S. Kavian |
10.5120/7533-9872 |
Arash Nosrat, Yousef S. Kavian . Hardware Description of Multi-Directional Fast Sobel Edge Detection Processor by VHDL for Implementing on FPGA. International Journal of Computer Applications. 47, 25 ( June 2012), 1-7. DOI=10.5120/7533-9872
The VHDL is an appropriate Hardware Description Language (HDL) for providing hardware models of practical image processing algorithms. The aim of this paper is to present hardware architecture of Sobel edge detection algorithm for implementing on field programmable gate array (FPGA) chips. The proposed architecture calculates the edges of gray scale images in four directions; vertical, horizontal, right diagonal and left diagonal. Simulation results and synthesizing proposed Sobel edge detection processor on Xilinx Spartan3 XC3S200 FPGA chip demonstrate the efficiency of proposed architecture for edge detecting of gray scale 1024×1024 images for real-time image processing applications.