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Reconfigurable Architecture for Network processing

by A. Kaleel Rahuman, G. Athisha
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 43 - Number 9
Year of Publication: 2012
Authors: A. Kaleel Rahuman, G. Athisha
10.5120/6135-8371

A. Kaleel Rahuman, G. Athisha . Reconfigurable Architecture for Network processing. International Journal of Computer Applications. 43, 9 ( April 2012), 43-49. DOI=10.5120/6135-8371

@article{ 10.5120/6135-8371,
author = { A. Kaleel Rahuman, G. Athisha },
title = { Reconfigurable Architecture for Network processing },
journal = { International Journal of Computer Applications },
issue_date = { April 2012 },
volume = { 43 },
number = { 9 },
month = { April },
year = { 2012 },
issn = { 0975-8887 },
pages = { 43-49 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume43/number9/6135-8371/ },
doi = { 10.5120/6135-8371 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T20:33:01.069088+05:30
%A A. Kaleel Rahuman
%A G. Athisha
%T Reconfigurable Architecture for Network processing
%J International Journal of Computer Applications
%@ 0975-8887
%V 43
%N 9
%P 43-49
%D 2012
%I Foundation of Computer Science (FCS), NY, USA
Abstract

The high performance of an elliptic curve (EC) crypto system depends efficiently on the arithmetic in the underlying finite field. We have to propose and compare two levels of Galois Field GF(2163) and GF(2193). The proposed architecture is based on Lopez-Dehab elliptic curve point multiplication algorithm, which uses Gaussian normal basis for GF(2163) field arithmetic. In which derived parallelized elliptic curve point doubling and addition algorithms with uniform addressing are based on Lopez-Dehab method. The proposed GF(2193) is based on an efficient Montgomery add and double algorithm, also the karatsuba-offman multiplier and Itoh-Tsjuii algorithm are used as the inverse component. The hardware design is based on optimized Finite State Machine(FSM), with a single cycle 193 bits multiplier, field adder and field squarer . The different optimization at the hardware level improves the acceleration of the ECC scalar multiplication; increases frequency and the speed of operation such as key generation, encryption and decryption. Finally we have to implement our design using Xilinx XC4VLX200 FPGA device.

References
  1. Mohamed Abdelkader Bencherif, Hamid Bessalah and Abderrezak Guessoum. Reconfigurable Elliptic curve crypto-Hardware over the Galois Field GF (2163). American Journal of Applied Sciences 6 (8): 1596-1603, 2009.
  2. Wollinger, T. J. Guajardo and C. Paar, 2004. Security on FPGA: State of the art implementations and attacks. ACM. Trans. Embedd. Comput. Syst. 3:53-59
  3. Barker, E. , W. Barker, W. Burr, W. Polk and M. Smid, 2007. NIST SP 800-57: Recommendation for key management. Lee, Y. K. , L. Batina, K. Sakiyama and I. Verbauwhede, 2008. Elliptic curve based security processor for RFID. IEEE. Trans. Comput. 57: 1514-1527.
  4. Chelton, W. N. and M. Benaissa, 2004. A Scalable GF (2m) arithmetic unit for application in an ECC Processor. Proceeding of the IEEE Workshop on Signal Processing Systems, Oct. 13-15, pp: 355-360.
  5. Sakiyama, K. , L. Batina, B. Preneel and I. Verbauwhede, 2007. High-performance public-key cryptoprocessor for wireless mobile applications. Mobile network application 12: 245-258.
  6. Grabbe C. ,M. Bednara, J. Tech, G. J. Von Zur and J. Shokrollahi, 2003. FPGA designs of parallel high performance (2233) multipliers [cryptographic applications]. Proceedings of the International symposium on circuits and systems, may 25-28 pp: 268-271.
  7. Sutikno. S. and A. Surya, 2000. An architecture of F2^2n multiplier for elliptic. Proceedings of the 2000. IEEE International symposiam on circuits and systems, pp: 279-282.
  8. Quan G. , J. P. Davis, S. Devarkal and D. A. Buell, 2005. High-level synthesis for large bit-width multipliers on FPGAs: A case study. Proceeding of the 3rd IEEE/ACM/IFIP International conference on Hardware/Software Co-Design and system synthesis, sept. 2005, pp: 213-218.
  9. Rodriguez-Henriquez F. , N. A. Saqib, A. Diaz-perez and C. Kaya Koc, 2006. Cryptographic Algorithms on Reconfigurable Hardware. Springer, ISBN: 0387338837, PP:299.
  10. Yong-ping DAN, Xue-cheng ZOU, Zheng-lin LIU,YUHAN, Li-hua YI, High-performance hardware architecture of elliptic curve cryptography processor over GF (2163)* Journal of Zhejiang University Science ISSN 1862-1775 (Online)
  11. Chelton, W. N. and M. Benaissa, 2008. Fast elliptic curve cryptography on FPGA. IEEE. Trans. Very Large Scale Integration system. , 16: 198-205. DOI:10. 1109/TVLSI. 2007. 912228.
  12. Smyth N. , M. McLoone and J. V. McCanny, 2006. An adaptable and scalable asymmetric cryptographic processor. Proceeding of the IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP), Sept. 2006, pp: 341-346.
  13. Sozzani F. ,G. Bertoni, S. Turcato, L. Breveblieri, 2005. A parallelized design for and elliptic curve cryptosystem coprocessor. Proceedings of the International Symposium on Information Technology Coding and Computing (ITCC), Oct. 4-6, pp: 626-630.
  14. Stefan Tillich and Johann Grobschadl " A simple Architectural Enhancement for Fast and Flexible Elliptic curve Cryptography over Binary Finite Fields GF(2m)", P. C. Yew and J. Xue (Eds): ACSAC 2004, LNCS 3189, PP:282-295.
  15. K. Sakiyama, N. Mentens,L. Batina, B. Preneel, and I. verbauwhede. Reconfigurable modular arithmetic logic unit supporting high performance RSA and ECC over GF(P). International Journal of Electronics, 94(5): 501-514, 2007.
  16. Gang Quan, James P. Davis, Siddhaveerasharan Devarkal, and Duncan A. Buell. High-Level Synthesis for Large Bit- Width Multipliers on FPGAs: A Case Study. Department of Computer Science and Engineering, University of South Carolina, Columbia, SC 29208 USA. pp 213:218.
  17. Miaoqing Huang1, Kris Gaj2, Soonhak Kwon3, and Tarek El-Ghazawi1. An Optimized Hardware Architecture for the Montgomery Multiplication Algorithm. _c International Association for Cryptologic Research 2008. pp. 214–228, 2008.
  18. Yu Fang Chung a,?, Kuo Hsuan Huang a, Feipei Lai a,b, Tzer Shyong Chen c. ID-based digital signature scheme on the elliptic curve cryptosystem. Received 5 August 2006; received in revised form 24 December 2006; accepted 27 January 2007. Available online 3 February 2007 Computer Standards & Interfaces 29 (2007) 601–604.
  19. E. Sava¸s, A. F. Tenca, and C¸ . K. Ko¸c. A Scalable and Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m). Lecture Notes in Computer Science No. 1965, pages 281-296, Springer Verlag, Berlin, Germany, 2000.
  20. Johann Großsch¨adl and Guy-Armand Kamendje. Instruction Set Extension for Fast Elliptic Curve Cryptography over Binary Finite Fields GF(2m). Proc. of the 14th IEEE Conf. on Application-specific Systems, Architectures and Processors (ASAP 2003), pp. 455–468. © IEEE 2003.
  21. M. A. Hasan, Senior Member, IEEE, and A. G. Wassal, Member, IEEE. VLSI Algorithms, Architectures, and Implementation of a Versatile GF(2m) Processor. IEEE TRANSACTIONS ON COMPUTERS, VOL. 49, NO. 10, OCTOBER 2000.
  22. Philip H. W. Leong, Senior Member, IEEE, and Ivan K. H. Leung. A Microcoded Elliptic Curve Processor Using FPGA Technology. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 10, NO. 5, OCTOBER 2002, 1063-8210/02$17. 00 © 2002 IEEE.
  23. William N. Chelton, Student Member, IEEE, and Mohammed Benaissa, Senior Member, Fast Elliptic Curve Cryptography on FPGA. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 16, NO. 2, FEBRUARY 2008. 1063-8210/$25. 00 © 2007 IEEE pp:198:205.
Index Terms

Computer Science
Information Sciences

Keywords

Elliptic Curves Cryptography Ecc Fpga Montgomery Karatsuba-offman Galois Field Operations

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