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Temperature effects on Threshold Voltage and Mobility for Partially Depleted SOI MOSFET

by Neha Goel, Ankit Tripathi
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 42 - Number 21
Year of Publication: 2012
Authors: Neha Goel, Ankit Tripathi
10.5120/5844-8163

Neha Goel, Ankit Tripathi . Temperature effects on Threshold Voltage and Mobility for Partially Depleted SOI MOSFET. International Journal of Computer Applications. 42, 21 ( March 2012), 56-58. DOI=10.5120/5844-8163

@article{ 10.5120/5844-8163,
author = { Neha Goel, Ankit Tripathi },
title = { Temperature effects on Threshold Voltage and Mobility for Partially Depleted SOI MOSFET },
journal = { International Journal of Computer Applications },
issue_date = { March 2012 },
volume = { 42 },
number = { 21 },
month = { March },
year = { 2012 },
issn = { 0975-8887 },
pages = { 56-58 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume42/number21/5844-8163/ },
doi = { 10.5120/5844-8163 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T20:31:58.690436+05:30
%A Neha Goel
%A Ankit Tripathi
%T Temperature effects on Threshold Voltage and Mobility for Partially Depleted SOI MOSFET
%J International Journal of Computer Applications
%@ 0975-8887
%V 42
%N 21
%P 56-58
%D 2012
%I Foundation of Computer Science (FCS), NY, USA
Abstract

As the channel lengths of conventional planar metal oxide semiconductor field effect transistor (MOSFET) shrink into the nano meter regime, performance of the devices becomes degraded mainly because of short channel effects. The nano range silicon on insulator metal oxide semiconductor field effect transistors (SOI-MOSFET) with Multi gate around the silicon channel can significantly improve the short channel effects and are therefore considered to be promising candidates for the next generation. In this paper a detailed investigation of short-channel effects in advanced partially depleted SOI N-MOSFETs is done, which shows SOI devices from the same wafer can behave as fully or partially depleted according to the channel length. This paper Comprise the Low temperature behavior of threshold Voltage and Mobility for Partially Depleted SOI MOSFET.

References
  1. J. Le Coz, P. Flatresse, S. Engels, A. Valentian,M. Belleville, C. Raynaud, D. Croain, and P. Urard, "Comparison of 65 nm LP bulk and LP PD-SOI with adaptive power gate body bias for an LDPC codec," in Proc. IEEE ISSCC, San Francisco, CA, Feb. 20–24, 2011, pp. 336–337.
  2. A. Siligaris, Y. Hamada, C. Mounet, C. Raynaud, B. Martineau, N. Deparis, N. Rolland, M. Fukaishi, and P. Vincent, "A 60 GHz power amplifier with 14. 5 dBm saturation power and 25% peak PAE in CMOS 65 nm SOI," IEEE J. Solid-State Circuits, vol. 45, no. 7, pp. 1286–1294, Jul. 2010.
  3. S. Cristoloveanu and S. S. Li, Electrical Characterization of SOI Materials and Devices. Norwell, MA: Kluwer, 1995.
  4. Pin Su, Samuel K. H. Fung*, Stephen Tang, Fariborz Assaderaghi and Chenming Hu "Partial-Depletion SO1 MOSFET Model for Deep-Submicron CMOS Designs" IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2000.
  5. Sze SM. Physics of semiconductor devices. 2nd ed. Wiley; 1981.
  6. Elewa T et al. Performance and physical mechanisms in SIMOX MOS transistors operated at very low temperature. IEEE Trans Electron Dev 1990;37:1007–19.
  7. Zaouia S, Goktepeli S, Perera AH, Cristoloveanu S. Short-channel, narrow channel and ultra-thin oxide effects in advanced SOI MOSFETs. ECS Proc 2005;3:309–16.
  8. Jeon DS, Burk DE. MOSFET electron inversion layer mobilities-A physical based semi-empirical model for a wide temperature range. IEEE Trans Electron Dev 1995;36–38:1456–63.
  9. Harstein A, Fowler AB, Albert M. Temperature dependence of scattering in the inversion layer. Surf Sci 1980;98:181–90.
  10. Stern F. Calculated temperature dependence of mobility in Si inversion layers. Phys Rev Lett 1980;44:1469–72.
  11. Ezawa H, Kawaji S, Nakamura K. Surfons and the electron mobility in silicon inversion layers. Japan J Appl Phys 1974;13:126–55.
  12. J. P. Colinge, M. H. Gao, A. Romano-Rodriguez, H. Maes, and C. Claeys, "Silicon on insulator 'gate-all-around device'," in IEDM Tech. Dig. , 1990, pp. 595–598.
  13. D. Frank, S. Laux, and M. Fischetti, "Monte Carlo simulation of a 30 nm dual-gate MOSFET: How far can Si go?," in IEDM Tech. Dig. , 1992, pp. 553–556.
  14. H. -S. Wong, D. J. Frank, Y. Taur, and J. M. C. Stork, "Design and performance considerations for Sub-0. 1 _m double-gate SOI MOSFETs," in IEDM Tech. Dig. , 1994, pp. 747–751.
  15. H. -S. P. Wong, "Beyond the conventional transistor," IBM J. Res. Dev. , vol. 46, no. 2/3, 2002.
  16. K. K. Young, "Short-channel effect in fully depleted SOI MOSFETs," IEEE Trans. Electron Devices, vol. 36, pp. 399– 402.
  17. R. Granzner, F. Schwierz, and M. P. Vladimir , "An Analytical Model for the Threshold Voltage Shift Caused by Two- Dimensional Quantum Confinement in Undoped Multiple-Gate MOSFETs," IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 54, NO. 9, SEPTEMBER 2007.
Index Terms

Computer Science
Information Sciences

Keywords

Partially Depleted Soi Mosfet Low Temperature Effects Conclusion

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