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FPGA Implementation of Low Complexity VLSI Architecture for DS-CDMA Communication System
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 42 - Number 20 |
| Year of Publication: 2012 |
| Authors: Amsavalli A., Kashwan K. R |
10.5120/5818-8130
|
Amsavalli A., Kashwan K. R . FPGA Implementation of Low Complexity VLSI Architecture for DS-CDMA Communication System. International Journal of Computer Applications. 42, 20 ( March 2012), 27-34. DOI=10.5120/5818-8130
Abstract
The principal goal of this research work is focused on designing and then testing the performance of source and channel coding and decoding circuits implemented on FPGA for Code Division Multiple Access (CDMA) Transceiver using extremely simple circuit concepts. The paper also describes modulation and demodulation circuits for CDMA. The latest technology advancement in cellular mobile communication systems has become more demanding for better quality of service. It requires broad bandwidth for huge quanta of data transfer. CDMA communication system easily meets these requirements of cellular communications. The design of the relevant circuits is based on CDMA approach of direct sequence spread spectrum technology. The functional performance of designed circuits is tested by carrying out simulations using Field Programmable Gate Arrays (FPGA) and Very High Speed Integrated Circuits Hardware Description Language (VHDL) on XILINX ISE® and MATLAB® platforms. The simulated results subsequently have shown quite improved and optimized circuit performance. The performance parameter is mainly based on the number of gates used by CDMA sub-circuits and systems on FPGA implementation.
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