We apologize for a recent technical issue with our email system, which temporarily affected account activations. Accounts have now been activated. Authors may proceed with paper submissions. PhDFocusTM
CFP last date
20 December 2024
Reseach Article

A Cost- Effective Design of Reversible Programmable Logic Array

by Pradeep Singla, Naveen Kr. Malik
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 41 - Number 15
Year of Publication: 2012
Authors: Pradeep Singla, Naveen Kr. Malik
10.5120/5619-7911

Pradeep Singla, Naveen Kr. Malik . A Cost- Effective Design of Reversible Programmable Logic Array. International Journal of Computer Applications. 41, 15 ( March 2012), 41-46. DOI=10.5120/5619-7911

@article{ 10.5120/5619-7911,
author = { Pradeep Singla, Naveen Kr. Malik },
title = { A Cost- Effective Design of Reversible Programmable Logic Array },
journal = { International Journal of Computer Applications },
issue_date = { March 2012 },
volume = { 41 },
number = { 15 },
month = { March },
year = { 2012 },
issn = { 0975-8887 },
pages = { 41-46 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume41/number15/5619-7911/ },
doi = { 10.5120/5619-7911 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T20:29:41.411105+05:30
%A Pradeep Singla
%A Naveen Kr. Malik
%T A Cost- Effective Design of Reversible Programmable Logic Array
%J International Journal of Computer Applications
%@ 0975-8887
%V 41
%N 15
%P 41-46
%D 2012
%I Foundation of Computer Science (FCS), NY, USA
Abstract

In the recent era, Reversible computing is a growing field having applications in nanotechnology, optical information processing, quantum networks etc. In this paper, the authors show the design of a cost effective reversible programmable logic array using VHDL. It is simulated on Xilinx ISE 8. 2i and results are shown. The proposed reversible Programming logic array called RPLA is designed by MUX gate & Feynman gate for 3- inputs, which is able to perform any reversible 3- input logic function or Boolean function. Furthermore the quantized analysis with comparative finding is shown for the realized RPLA against the existing one. The result shows improvement in the quantum cost and total logical calculation in proposed RPLA.

References
  1. R. Landauer,''Irreversibility and heat generation in the computational process'', IBM J. Res. Develop. , vol. 5, pp. 183-191, 1961
  2. C. H. Bennet, "Logical reversibility of computation", IBM J. Res. Develop. , vol. 17, no. 6, pp. 525-532, 1973.
  3. T. Toffoli, "Reversible Computing" , Tech memo MIT/LCS/TM-151 , MIT Lab for computer science 1980.
  4. E. Fredkin and T. Toffoli, " Conservative logic," Int'1J. Theoretical Physics, Vol. 11, pp. 219-253,1985
  5. R. Feynman, " Quantum Mechanical Computers," Optics News, Vol11-20,1985.
  6. Peres, "Reversible logics and quantum computers" , Physical review A, 32: 3266-3276,1985.
  7. Ahsan Raja chowdhury,Rumana Nazmul,Hafiz Md. Hasan babu, "A new approach to synthesis multiple-output functions using reversible programmable logic array" proceedings of the 19th international conference on visa design. , 1063-9667,2006.
  8. Matthew Moisin and Nagaranjan Ranganathan, "Design of a reversible ALU based on a novel programmable reversible logic gate structures", IEEE computer society annual symposium on vlsi,2011.
  9. Himanshu Thapliyal and Hamid R. Arabnia, "Reversible programmable logic array using fredkin & Feynman gates for industrial Electronics and applications" , Proceedings if international conference on embedded systems(ESA'06), June 2006, USA
  10. Abu Sadat Md. Sayem and Sajib Kumar Mitra, "Efficient approach to design low power reversible logic blocks for field programmable gate arrays"978-114244-8728-8/11/IEEE 2011
  11. H. R. Bhagyalakshmi, M. K. Venkeatesha, "An improved design of a multiplier using reversible logic gates", International journal of engineering science and technology, vol. 2 (8), pp. 3838-3845,2010
  12. G. De Mey and A. De Vos, "The minimum energy for a one bit commutation: a proof of the Landauer limit", proc. 26th international conf. On microelectronics IEEE, 2008.
  13. Michael P. Frank, "Introduction to reversible computing: motivation, progress, and challenges", proceedings of 2nd international conference on computing frontiers ACM newyork,2005
  14. Saurabh sahni, ankur bakshi, "Reversible computing: looking ahead of the curve" , www. it. iitb. ac. in/~saurabh/documents/revpaper. pdf
  15. Mjid Haghparast, Mazid Mohammdi, Keivan Navi , "Optimized reversible multiplier circuit", Journal of circuits, systems and computers.
  16. J. Bhasker , " A VHDL Primer" , Third edition, Pearson education.
Index Terms

Computer Science
Information Sciences

Keywords

Garbage Outputs Quantum Cost Reversible Gate Reversible Programming Logic Array Vhdl