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Reseach Article

An Efficient Design of 2:1 Multiplexer and Its Application in 1-Bit Full Adder Cell

by Ila Gupta, Neha Arora, B. P. Singh
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 40 - Number 2
Year of Publication: 2012
Authors: Ila Gupta, Neha Arora, B. P. Singh
10.5120/4930-7161

Ila Gupta, Neha Arora, B. P. Singh . An Efficient Design of 2:1 Multiplexer and Its Application in 1-Bit Full Adder Cell. International Journal of Computer Applications. 40, 2 ( February 2012), 31-36. DOI=10.5120/4930-7161

@article{ 10.5120/4930-7161,
author = { Ila Gupta, Neha Arora, B. P. Singh },
title = { An Efficient Design of 2:1 Multiplexer and Its Application in 1-Bit Full Adder Cell },
journal = { International Journal of Computer Applications },
issue_date = { February 2012 },
volume = { 40 },
number = { 2 },
month = { February },
year = { 2012 },
issn = { 0975-8887 },
pages = { 31-36 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume40/number2/4930-7161/ },
doi = { 10.5120/4930-7161 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T20:27:02.821678+05:30
%A Ila Gupta
%A Neha Arora
%A B. P. Singh
%T An Efficient Design of 2:1 Multiplexer and Its Application in 1-Bit Full Adder Cell
%J International Journal of Computer Applications
%@ 0975-8887
%V 40
%N 2
%P 31-36
%D 2012
%I Foundation of Computer Science (FCS), NY, USA
Abstract

A multiplexer, sometimes referred to as a "mux", is a device that selects between a numbers of input signals. It is a combinational logic circuit. It is a unidirectional device and used in any application in which data must be switched from multiple sources to a destination. This paper represents the simulation of different 2:1 Multiplexer Structures and their comparative analysis on different parameters such as power supply voltage, operating frequency, temperature and area efficiency etc and its application in 1 bit full adder cell. All the simulations have been carried out on BSIM 3V3 90nm technology at Tanner EDA tool.

References
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Index Terms

Computer Science
Information Sciences

Keywords

CMOS Logic Low power Full adder and VLSI