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Modelling of Parasitic Capacitances for Single-Gate, Double-Gate and Independent Double-Gate MOSFET

by Neha Srivastava, G. S. Tripathi
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 35 - Number 9
Year of Publication: 2011
Authors: Neha Srivastava, G. S. Tripathi
10.5120/4430-6167

Neha Srivastava, G. S. Tripathi . Modelling of Parasitic Capacitances for Single-Gate, Double-Gate and Independent Double-Gate MOSFET. International Journal of Computer Applications. 35, 9 ( December 2011), 25-31. DOI=10.5120/4430-6167

@article{ 10.5120/4430-6167,
author = { Neha Srivastava, G. S. Tripathi },
title = { Modelling of Parasitic Capacitances for Single-Gate, Double-Gate and Independent Double-Gate MOSFET },
journal = { International Journal of Computer Applications },
issue_date = { December 2011 },
volume = { 35 },
number = { 9 },
month = { December },
year = { 2011 },
issn = { 0975-8887 },
pages = { 25-31 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume35/number9/4430-6167/ },
doi = { 10.5120/4430-6167 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T20:21:32.719394+05:30
%A Neha Srivastava
%A G. S. Tripathi
%T Modelling of Parasitic Capacitances for Single-Gate, Double-Gate and Independent Double-Gate MOSFET
%J International Journal of Computer Applications
%@ 0975-8887
%V 35
%N 9
%P 25-31
%D 2011
%I Foundation of Computer Science (FCS), NY, USA
Abstract

This paper discusses the type of capacitances for Single Gate MOSFET and Double Gate MOSFET including their quantity. The effect of parasitic capacitance makes double gate MOSFET more suitable component for the designing of digital logic switches than single gate MOSFET. Here, we introducing Independent double gate MOSFET operation based on VeSFET concept. Then introducing with the total capacitance model of Independent double gate MOSFET and compared its performance parameters with double gate MOSFET and the single gate MOSFET. Double gate transistor circuit is the first choice for reduction of short channel effect in application of MOSFET. The basic advantage of double gate MOSFET is its area required. But design CMOS double gate transistor for AND functionality suffering from high leakage current; while using Independent double gate MOSFET based on VeSFET concept reduction of that leakage current is possible. So, we can easily implement logic circuits while using CMOS design based on Independent double gate MOSFET which gives high performance.

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Index Terms

Computer Science
Information Sciences

Keywords

Junction capacitance MATLAB simulation DG MOSFET VeSFET IDG MOSFET VLSI