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Implementation of Delay and Power Monitoring Schemes to Reduce the Power Consumption
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 22 - Number 7 |
| Year of Publication: 2011 |
| Authors: Pavan.T.K, Jagannadha Naidu.K, Nagaraju.V |
10.5120/2599-3613
|
Pavan.T.K, Jagannadha Naidu.K, Nagaraju.V . Implementation of Delay and Power Monitoring Schemes to Reduce the Power Consumption. International Journal of Computer Applications. 22, 7 ( May 2011), 1-7. DOI=10.5120/2599-3613
Abstract
As process technology shrinks, the adaptive leakage power compensation scheme will become more important in realizing high-performance and low-power applications. In order to minimize total active power consumption in digital circuits, one must take into account sub-threshold leakage currents that grow exponentially as technology scales. This describes to predict how dynamic power and sub-threshold power must be balanced. The exclusive supply voltage control switching makes stable operations. The threshold voltage control successfully maintains a ratio of switching to leakage current and which represents the reduced power consumption. The goal of this paper is to: i) Maintains the optimized body bias conditions. ii) Maintains the best power-delay tradeoff. The results with a 180-nm CMOS device explain that the proposed architecture causes in the successful optimization of power.
References
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