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Integration and Performance Investigation of Multilevel Inverter with Half Bridge and Developed H-bridge Configurations

by Mahwish Memon, Mukhtiar Ahmed Mahar, Aneeqa Sattar
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 183 - Number 41
Year of Publication: 2021
Authors: Mahwish Memon, Mukhtiar Ahmed Mahar, Aneeqa Sattar
10.5120/ijca2021921812

Mahwish Memon, Mukhtiar Ahmed Mahar, Aneeqa Sattar . Integration and Performance Investigation of Multilevel Inverter with Half Bridge and Developed H-bridge Configurations. International Journal of Computer Applications. 183, 41 ( Dec 2021), 51-54. DOI=10.5120/ijca2021921812

@article{ 10.5120/ijca2021921812,
author = { Mahwish Memon, Mukhtiar Ahmed Mahar, Aneeqa Sattar },
title = { Integration and Performance Investigation of Multilevel Inverter with Half Bridge and Developed H-bridge Configurations },
journal = { International Journal of Computer Applications },
issue_date = { Dec 2021 },
volume = { 183 },
number = { 41 },
month = { Dec },
year = { 2021 },
issn = { 0975-8887 },
pages = { 51-54 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume183/number41/32207-2021921812/ },
doi = { 10.5120/ijca2021921812 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-07T01:19:24.813070+05:30
%A Mahwish Memon
%A Mukhtiar Ahmed Mahar
%A Aneeqa Sattar
%T Integration and Performance Investigation of Multilevel Inverter with Half Bridge and Developed H-bridge Configurations
%J International Journal of Computer Applications
%@ 0975-8887
%V 183
%N 41
%P 51-54
%D 2021
%I Foundation of Computer Science (FCS), NY, USA
Abstract

This document introduces a new structure of power switches for Developed H-bridge with half bridge connected in cascade to provide increased of a nine-stepped output voltage inverter. The proposed model requires lesser number of switches and dc power sources, which results in decreasing the complexity of total cost of inverter. The multi-carrier pulse width modulation (LS-PD-PWM) method is designed to reduce the percentage of (THD) Total harmonic distortion. The output voltage THD is calculated using FFT analysis tool and is found to be 13.97%. The results taken by simulation are validated using MATLAB/SIMULINK software.

References
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Index Terms

Computer Science
Information Sciences

Keywords

Multilevel Inverter POD-PWM Cascaded H-Bridge inverter MATLAB/Simulink Model.

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