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Design of Low Power Barrel Shifter using Pulsed Latches
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 182 - Number 50 |
| Year of Publication: 2019 |
| Authors: Surya A. |
10.5120/ijca2019918734
|
Surya A. . Design of Low Power Barrel Shifter using Pulsed Latches. International Journal of Computer Applications. 182, 50 ( Apr 2019), 9-13. DOI=10.5120/ijca2019918734
Abstract
In this paper, a barrel shifter is a specialized digital electronic circuit with the purpose of shifting an entire data word by a specified number of bits by using combinational logic and sequential logic used. Multiplexer based 8-bit barrel shifter circuit is implemented using the hardware description language ―Verilog. The proposed barrel shifter architecture implementation shows reduction in power consumption
References
- G. V. Nikhil ; B. P. Vaibhav ; Vishnu G. Naik ; B. S. Premananda,Design of low power barrel shifter and vedic multiplier with kogge-stone adder using reversible logic gates, 2017 International Conference on Communication and Signal Processing (ICCSP)Year: 2017
- M B Rakesh ,Performance comparison of 8 bit & 32 bit logarithmic barrel shifter using Fredkin & SCRL gates,2017 International Conference on Circuits, Controls, and Communications (CCUBE),Year: 2017
- P. Rajesh, D. Suresh Chandra, L. Sai Kumar, G. Kaushik,Comparative Analysis of Pulsed Latch and Flip-Flop basedShift Registers for High-Performanceand Low-Power Systems. IJECT Vol. 7, Issue 2, April - June 2016
- S. B. Jondhale1, T. S. Mulla, S. S. Patil,Design and Implementation of 8 Bit Barrel Shifter Using 2:1 Multiplexer, Journal of Advances in Science and TechnologyVol. 12, Issue No. 25, (Special Issue) December-2016
- CheekatiSirisha ,K. Prakash ,Pulsed Latches Methodology to Attain Reduced Power and Area Based On Shift Register,International Journal Of Engineering And Computer Science,Volume 5 Issue 10 Oct. 2016
- Prof. Sherief Reda ,Design and Implementation of VLSI Systems ,Lecture 24: Sequential Circuit Design
- Matthew Rudolf Pillmeier,Barrel shifter design, optimization, and analysis ,Theses and Dissertations 2001.
- Moshe Morris Mano , Digital Design, Pearson Education, 2002.
- M. Seckora, \Barrel Shifter or Multiply/Divide IC Structure," U.S. Patent 5,465,222, November 1995.
- J. Muwa, G. Fettweis, and H. Ne , \Circuit for Rotating, Left Shifting, or Right Shifting Bits," U.S. Patent 5.978,822, December 1995.
- . T. Thomson and H. Tam, \Barrel Shifter," U.S. Patent 5,652,718, July 1997.
- . G. F. Burns, \Method for Generating Barrel Shifter Result Flags Directly from Input Data," U.S. Patent 6,009,451, December 1999.
- . H. S. Lau and L. T. Ly, \Left Shift Over ow Detection," U.S. Patent 5,777,906, July 1998.
- . K. Dang and D. Anderson, \High-Speed Barrel Shifter," U.S. Patent 5,416,731, May 1995.
- Prasad D Khandekar, Dr. Mrs. Shaila Subbaraman, Venkat Raman Vinjamoori ”Low Power 2:1 MUX for Barrel Shifter” First International Conference on Emerging Trends in Engineering and Technology.
- Shen-fu Hsiao, Jia-Stang Yeh, and Da-Yen Chen, “High Performance Multiplexer Based Logic Synthesis Using Pass-transistor Logic”,Taylor & francis Gropu, VLSI Design, vol. 15(1), pp. 417-426, in year 2002.
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