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Reversible Logic gate based on QSD Addition/Subtraction using DPG Gate
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 182 - Number 47 |
| Year of Publication: 2019 |
| Authors: Asiya Hasan, Nishi Pandey, Meha Shrivastava |
10.5120/ijca2019918723
|
Asiya Hasan, Nishi Pandey, Meha Shrivastava . Reversible Logic gate based on QSD Addition/Subtraction using DPG Gate. International Journal of Computer Applications. 182, 47 ( Apr 2019), 42-45. DOI=10.5120/ijca2019918723
Abstract
Arithmetic Logic Unit plays a vital role in the central processing unit of the computer system. Addition is considered to be a primary part in the ALU. Power and speed are the major parameters to be kept in mind for designing an adder. Because of carry propagation, complexity and delay gets introduced in the adder circuit due to which addition, subtraction and multiplication obtains delay in the Arithmetic Logic unit. In order to reduce the delay, carry-free addition is introduced by QSD (Quaternary Signed Digit) Numbers. In this paper, a fast QSD Addition and Subtraction circuit is designed by use of DPG Reversible Logic Gates.
References
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