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Reversible Logic gate based on QSD Addition/Subtraction using DPG Gate

by Asiya Hasan, Nishi Pandey, Meha Shrivastava
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 182 - Number 47
Year of Publication: 2019
Authors: Asiya Hasan, Nishi Pandey, Meha Shrivastava
10.5120/ijca2019918723

Asiya Hasan, Nishi Pandey, Meha Shrivastava . Reversible Logic gate based on QSD Addition/Subtraction using DPG Gate. International Journal of Computer Applications. 182, 47 ( Apr 2019), 42-45. DOI=10.5120/ijca2019918723

@article{ 10.5120/ijca2019918723,
author = { Asiya Hasan, Nishi Pandey, Meha Shrivastava },
title = { Reversible Logic gate based on QSD Addition/Subtraction using DPG Gate },
journal = { International Journal of Computer Applications },
issue_date = { Apr 2019 },
volume = { 182 },
number = { 47 },
month = { Apr },
year = { 2019 },
issn = { 0975-8887 },
pages = { 42-45 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume182/number47/30513-2019918723/ },
doi = { 10.5120/ijca2019918723 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-07T01:14:35.307097+05:30
%A Asiya Hasan
%A Nishi Pandey
%A Meha Shrivastava
%T Reversible Logic gate based on QSD Addition/Subtraction using DPG Gate
%J International Journal of Computer Applications
%@ 0975-8887
%V 182
%N 47
%P 42-45
%D 2019
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Arithmetic Logic Unit plays a vital role in the central processing unit of the computer system. Addition is considered to be a primary part in the ALU. Power and speed are the major parameters to be kept in mind for designing an adder. Because of carry propagation, complexity and delay gets introduced in the adder circuit due to which addition, subtraction and multiplication obtains delay in the Arithmetic Logic unit. In order to reduce the delay, carry-free addition is introduced by QSD (Quaternary Signed Digit) Numbers. In this paper, a fast QSD Addition and Subtraction circuit is designed by use of DPG Reversible Logic Gates.

References
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Index Terms

Computer Science
Information Sciences

Keywords

Quaternary Signed Digit (QSD) Reversible Gate DPG Gate Carry Free Addition

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