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Reseach Article

Design and Comparison of High Speed Radix-8 and Radix-16 Booth’s Multipliers

by Ila Chaudhary, Deepika Kularia, Romika Choudhary, Gagandeep Kaur, Ashish Vats
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 181 - Number 2
Year of Publication: 2018
Authors: Ila Chaudhary, Deepika Kularia, Romika Choudhary, Gagandeep Kaur, Ashish Vats
10.5120/ijca2018917410

Ila Chaudhary, Deepika Kularia, Romika Choudhary, Gagandeep Kaur, Ashish Vats . Design and Comparison of High Speed Radix-8 and Radix-16 Booth’s Multipliers. International Journal of Computer Applications. 181, 2 ( Jul 2018), 6-10. DOI=10.5120/ijca2018917410

@article{ 10.5120/ijca2018917410,
author = { Ila Chaudhary, Deepika Kularia, Romika Choudhary, Gagandeep Kaur, Ashish Vats },
title = { Design and Comparison of High Speed Radix-8 and Radix-16 Booth’s Multipliers },
journal = { International Journal of Computer Applications },
issue_date = { Jul 2018 },
volume = { 181 },
number = { 2 },
month = { Jul },
year = { 2018 },
issn = { 0975-8887 },
pages = { 6-10 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume181/number2/29686-2018917410/ },
doi = { 10.5120/ijca2018917410 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-07T01:04:44.080504+05:30
%A Ila Chaudhary
%A Deepika Kularia
%A Romika Choudhary
%A Gagandeep Kaur
%A Ashish Vats
%T Design and Comparison of High Speed Radix-8 and Radix-16 Booth’s Multipliers
%J International Journal of Computer Applications
%@ 0975-8887
%V 181
%N 2
%P 6-10
%D 2018
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Multiplier is one of the hardware block which generally occupies a significant chip area and is required to be minimized which will be fruitful to number of applications in which multiplier blocks constitute an important unit such as digital signal processing (DSP) systems or computational techniques. Battery operated systems require low power devices to be implemented which can be minimized if the hardware required for the device is reduced logically. This paper focuses the DSP applications in which multiplier is significantly used and proposes a technique that helps in reducing the hardware as well as delay leading to the rise in performance of the system thus helping in increasing the operation frequency by a significant value. A 16-bit multiplier has been designed using a radix-8 and radix-16 Booth’s multiplication that reduces number of partial products.

References
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Index Terms

Computer Science
Information Sciences

Keywords

Radix-8 Booth’s multiplier Radix-16 Booth’s multiplier Partial products