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Gain and Bandwidth Enhancement in CMOS Low-Voltage Low-Power Operational Amplifiers

by Mohammad Reza Safarian, Ghazal Moradi, Saber Izadpanah Toos
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 177 - Number 23
Year of Publication: 2019
Authors: Mohammad Reza Safarian, Ghazal Moradi, Saber Izadpanah Toos
10.5120/ijca2019919671

Mohammad Reza Safarian, Ghazal Moradi, Saber Izadpanah Toos . Gain and Bandwidth Enhancement in CMOS Low-Voltage Low-Power Operational Amplifiers. International Journal of Computer Applications. 177, 23 ( Dec 2019), 8-14. DOI=10.5120/ijca2019919671

@article{ 10.5120/ijca2019919671,
author = { Mohammad Reza Safarian, Ghazal Moradi, Saber Izadpanah Toos },
title = { Gain and Bandwidth Enhancement in CMOS Low-Voltage Low-Power Operational Amplifiers },
journal = { International Journal of Computer Applications },
issue_date = { Dec 2019 },
volume = { 177 },
number = { 23 },
month = { Dec },
year = { 2019 },
issn = { 0975-8887 },
pages = { 8-14 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume177/number23/31035-2019919671/ },
doi = { 10.5120/ijca2019919671 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-07T00:46:40.556084+05:30
%A Mohammad Reza Safarian
%A Ghazal Moradi
%A Saber Izadpanah Toos
%T Gain and Bandwidth Enhancement in CMOS Low-Voltage Low-Power Operational Amplifiers
%J International Journal of Computer Applications
%@ 0975-8887
%V 177
%N 23
%P 8-14
%D 2019
%I Foundation of Computer Science (FCS), NY, USA
Abstract

In this paper, a low-voltage low-power CMOS operational amplifier using the composite cascode technique is presented. This technique has been employed in the differential input pair and output transistors to enhance the gain of op-amp. Also, indirect compensation is used to improve the frequency response of the op-amp and avoids instability when a large capacitive load at the output of the op-amp must be handled. Two-stage op-amp is designed and simulated in a TSMC 0.18 μm CMOS technology, to evaluate the proposed technique. The sub-threshold region is employed in the design to use the low supply voltage and reduce power consumption effectively. The op-amp operates at a 0.7 V power supply with 891 nW power consumption. The open-loop gain is 90.1 dB, the unity gain-bandwidth (UGBW) is 309 kHz, and the phase margin is 57.6 degree under 15 pF load.

References
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  24. Table 2. The Size of transistors, Capacitors, and Reference Current
  25. 
  26. 
  27. proposed
  28. 
  29. 
  30. 
  31. 
  32. 
  33. Technology (µm)
  34. 0.18
  35. 0.18
  36. 0.18
  37. 0.18
  38. 0.18
  39. 
  40. Power supply (mV)
  41. 700
  42. 500
  43. 800
  44. 500
  45. 700
  46. 
  47. Power consumption (µW)
  48. 0.891
  49. 0.085
  50. 1.2
  51. 1.02
  52. 82
  53. 
  54. Gain (dB)
  55. 90.1
  56. 101
  57. 51
  58. 88.5
  59. 74.2
  60. 
  61. Phase margin (Degree)
  62. 57.6
  63. 50.59
  64. 60
  65. 66.3
  66. 76.5
  67. 
  68. Unity gain-bandwidth (kHz)
  69. 309
  70. 8.6
  71. 57
  72. 83.88
  73. 25000
  74. 
  75. CMRR (dB)
  76. 100.3@ 10 Hz
  77. 90 @ DC
  78. -----
  79. 133.85
  80. -----
  81. 
  82. PSRR (dB)
  83. 120.6 @ 10 Hz
  84. -----
  85. -----
  86. -----
  87. -----
  88. 
  89. Slew Rate (V/µs)
  90. 0.065
  91. -----
  92. 0.14
  93. 0.052
  94. 13
  95. 
  96. Input referred noise (
Index Terms

Computer Science
Information Sciences

Keywords

Low-Voltage Low-Power Op-amp Composite cascode Indirect compensation DC gain Unity gain-bandwidth.

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