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Reseach Article

Hardware Implementation for Pileup Correction Algorithms in Gamma_Ray Spectroscopy

by Manar M. Ouda, Mohamed S. El_Tokhy, Sherief Hashima, Imbaby I. Mahmoud, Mohamed Amal-Eldin, Nesreen I. Ziedan
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 176 - Number 6
Year of Publication: 2017
Authors: Manar M. Ouda, Mohamed S. El_Tokhy, Sherief Hashima, Imbaby I. Mahmoud, Mohamed Amal-Eldin, Nesreen I. Ziedan
10.5120/ijca2017915634

Manar M. Ouda, Mohamed S. El_Tokhy, Sherief Hashima, Imbaby I. Mahmoud, Mohamed Amal-Eldin, Nesreen I. Ziedan . Hardware Implementation for Pileup Correction Algorithms in Gamma_Ray Spectroscopy. International Journal of Computer Applications. 176, 6 ( Oct 2017), 43-48. DOI=10.5120/ijca2017915634

@article{ 10.5120/ijca2017915634,
author = { Manar M. Ouda, Mohamed S. El_Tokhy, Sherief Hashima, Imbaby I. Mahmoud, Mohamed Amal-Eldin, Nesreen I. Ziedan },
title = { Hardware Implementation for Pileup Correction Algorithms in Gamma_Ray Spectroscopy },
journal = { International Journal of Computer Applications },
issue_date = { Oct 2017 },
volume = { 176 },
number = { 6 },
month = { Oct },
year = { 2017 },
issn = { 0975-8887 },
pages = { 43-48 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume176/number6/28560-2017915634/ },
doi = { 10.5120/ijca2017915634 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-07T00:41:51.134726+05:30
%A Manar M. Ouda
%A Mohamed S. El_Tokhy
%A Sherief Hashima
%A Imbaby I. Mahmoud
%A Mohamed Amal-Eldin
%A Nesreen I. Ziedan
%T Hardware Implementation for Pileup Correction Algorithms in Gamma_Ray Spectroscopy
%J International Journal of Computer Applications
%@ 0975-8887
%V 176
%N 6
%P 43-48
%D 2017
%I Foundation of Computer Science (FCS), NY, USA
Abstract

One of the main detection duties in spectroscopy system is pileup detection of the location of the maximum peaks utilizing a local extreme method. This paper presents the hardware implementation of two pile up recovery algorithms. The first algorithm utilizes a peak detection algorithm, while the second one utilizes a peak sensitivity algorithm. The two algorithms are designed and evaluated by compiling MATLAB into field programmable gate array (FPGA) using Xilinx system generator (XSG). The tested signal is captured by analogue to-digital converter (ADC) with sampling rate of 16MS/s. The results confirm that the first algorithm is better than the second one due to its simple architecture, which leads to faster processing speed.

References
  1. G. F. Knoll, "Radiation detection and measurement." Third Edition, John Wiley and Sons, NY, 2000.
  2. M. Bolic and V. Drndarevic, "Digital gamma-ray spectroscopy based on FPGA technology," Nuclear Instruments and Methods in Physics Research, Vol. 482, pp.761–766, 2002.
  3. "System Generator for DSP User Guide UG 640 (v11.4)," December 2, 2009
  4. I.I. Mahmoud, M.S. El Tokhy, and H. A. Konber, "Pileup recovery algorithms for digital gamma ray spectroscopy," Journal of Instrumentation, IOP, pp. 1-19, 2012.
  5. I.I. Mahmoud, M.S. El Tokhy, "Development of coincidence summing for digital gamma ray spectroscopy," J. Anal. At. Spectrom, Vol. 29, pp. 1459–1466, 2014.
  6. M. D. Haselman, J. Pasko et al., "FPGA-Based Pulse Pile-Up Correction With Energy and Timing Recovery, " Nuclear Science, IEEE Nuclear and Plasma Sciences Society, Vol. 59,  2011.
  7. M. Bolic, V. Drndarevic, and W. Gueaieb, "Pileup Correction Algorithms for Very-High-Count-Rate -Ray Spectrometry With NaI(Tl) Detectors," Senior Member, IEEE Transactions On Instrumentation And Measurement, Vol. 59, NO. 1, January 2010.
  8. J. Liu et al., "Real time digital implementation of the high-yield pile- up-event-recovery (HYPER) method," in 2007 IEEE Nuclear Science Symposium Conference Record, vol. M26-4, pp. 4230–4232.
  9. M. D. Haselman, S. Hauck, T. K. Lewellen, and R. S. Miyaoka, "Simulation of algorithms for pulse timing in FPGAs," in IEEE Nuclear Science Symp. Conf. Record, 2007, pp. 3161–3165.
  10. I.I. Mahmoud, M.S. El Tokhy, "Advanced signal separation and recovery algorithms for digital x-ray spectroscopy," Nuclear Instruments and Methods in Physics Research A773, pp. 104–113, 2015.
  11. "Xilinx, Spartan-3E FPGA Starter Kit Board User Guide," UG230, vol. 1.2, 2011.
  12. T. Saidani , D. Dia, W. Elhamzi, M. Atri and R. Tourki,,"Hardware Co-simulation For Video Processing Using Xilinx System Generator," Proceedings of the World Congress on Engineering 2009 Vol I WCE 2009, July 1 - 3, 2009, London, U.K.
  13. M. M. Ouda, M. S. El_Tokhy, M. Amal-Eldin , Sh. Hashima, N.. Ziedan, and I. I. Mahmoud, "Development of Pileup Recovery Algorithms by Peak Detection Method of Digital Gamma Ray Spectroscopy," IEEE National Radio Science Conf. (NRSC). P.487 – 491, 2017.
Index Terms

Computer Science
Information Sciences

Keywords

Pulse pile up Digital signal processing XSG FPGA