We apologize for a recent technical issue with our email system, which temporarily affected account activations. Accounts have now been activated. Authors may proceed with paper submissions. PhDFocusTM
CFP last date
20 December 2024
Reseach Article

Very Long Instruction Word: A Higher Performance Processor

by Adedoyin Odumabo, Ademola Adedokun, Akinlolu Adekotujo, Oluwatosin Ogunbodede
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 175 - Number 15
Year of Publication: 2020
Authors: Adedoyin Odumabo, Ademola Adedokun, Akinlolu Adekotujo, Oluwatosin Ogunbodede
10.5120/ijca2020920645

Adedoyin Odumabo, Ademola Adedokun, Akinlolu Adekotujo, Oluwatosin Ogunbodede . Very Long Instruction Word: A Higher Performance Processor. International Journal of Computer Applications. 175, 15 ( Aug 2020), 11-15. DOI=10.5120/ijca2020920645

@article{ 10.5120/ijca2020920645,
author = { Adedoyin Odumabo, Ademola Adedokun, Akinlolu Adekotujo, Oluwatosin Ogunbodede },
title = { Very Long Instruction Word: A Higher Performance Processor },
journal = { International Journal of Computer Applications },
issue_date = { Aug 2020 },
volume = { 175 },
number = { 15 },
month = { Aug },
year = { 2020 },
issn = { 0975-8887 },
pages = { 11-15 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume175/number15/31528-2020920645/ },
doi = { 10.5120/ijca2020920645 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-07T00:25:06.675785+05:30
%A Adedoyin Odumabo
%A Ademola Adedokun
%A Akinlolu Adekotujo
%A Oluwatosin Ogunbodede
%T Very Long Instruction Word: A Higher Performance Processor
%J International Journal of Computer Applications
%@ 0975-8887
%V 175
%N 15
%P 11-15
%D 2020
%I Foundation of Computer Science (FCS), NY, USA
Abstract

The quest for improvements in the execution of system instructions whilst upholding processor efficiency begot different discoveries. Hardware solutions, such as having multiprocessors seem to be more expensive and had some challenges with it. Over the years, different software approaches have been discovered and explored. Unfortunately, some of these approaches still hugely depend on the permissibility of the hardware facility which could hinder productivity. Very Long Instruction Word (VLIW) processor adopts an instruction level parallelism (ILP) method that is fully software based. This paper provides an overview, performs a comparison with other related architectures such as CISC, RISC and highlights VLIW’s development over the years as well as reasons to adopt this technology. The methodology and techniques used in this work include analysis of available documents, and content analysis techniques. This Analysis shows that VLIW machine performed better compared to other traditional machines using instruction’s size, format, semantics as well as memory, registers and hardware design as metrics for comparison. VLIW is indeed a step ahead of the others and allows higher performance without the complexity inherent in other designs.

References
  1. R. P. Colwell, R. P. Nix, J. J. O'donnell, D. B. Papworth, and P. K. Rodman, "A VLIW architecture for a trace scheduling compiler." pp. 180-192.
  2. J. A. Fisher, P. Faraboschi, and C. Young, Embedded computing: a VLIW approach to architecture, compilers and tools: Elsevier, 2005.
  3. L. H. John, and A. P. David, Computer Architecture; A Quantitative Approach, fourth ed.: MK Morgan Kaufmann Publishers, 2007.
  4. R. P. Colwell, W. E. Hall, C. S. Joshi, D. B. Papworth, P. K. Rodman, and J. E. Tornes, "Architecture and implementation of a VLIW supercomputer." pp. 910-919.
  5. M. Lam, "Software pipelining: An effective scheduling technique for VLIW machines." pp. 318-328.
  6. A. Aiken, and A. Nicolau, " Perfect pipelining: A new loop parallelization technique ". pp. 221–235.
  7. Schaum’s, Outline of Theory and Problems of Computer Architecture The McGraw-Hill Companies Inc. Indian Special Edition, 2009.
  8. B. R. Rau, and J. A. Fisher, “Instruction-level parallel processing: history, overview, and perspective,” The journal of Supercomputing, vol. 7, no. 1-2, pp. 9-50, 1993.
  9. B. Mathew, “very long instruction word architecture (VLIW processors and trace scheduling)”, 2006.
  10. X. Fu, L. Riesebos, M. A. Rol, J. van Straten, J. van Someren, N. Khammassi, I. Ashraf, R. F. L. Vermeulen, V. Newsum, K. K. L. Loh, J. C. de Sterke, W. J. Vlothuizen, R. N. Schouten, C. G. Almudever, L. DiCarlo, and K. Bertels, "eQASM: An Executable ƒantum Instruction Set Architecture."
Index Terms

Computer Science
Information Sciences

Keywords

Very long instruction word