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Low Power Wide Fan-in Control Pulse Operated Domino Multiplexor with Static Switching

by Vivek Mishra, Vivek Kumar Modanwal
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 172 - Number 8
Year of Publication: 2017
Authors: Vivek Mishra, Vivek Kumar Modanwal
10.5120/ijca2017915194

Vivek Mishra, Vivek Kumar Modanwal . Low Power Wide Fan-in Control Pulse Operated Domino Multiplexor with Static Switching. International Journal of Computer Applications. 172, 8 ( Aug 2017), 23-29. DOI=10.5120/ijca2017915194

@article{ 10.5120/ijca2017915194,
author = { Vivek Mishra, Vivek Kumar Modanwal },
title = { Low Power Wide Fan-in Control Pulse Operated Domino Multiplexor with Static Switching },
journal = { International Journal of Computer Applications },
issue_date = { Aug 2017 },
volume = { 172 },
number = { 8 },
month = { Aug },
year = { 2017 },
issn = { 0975-8887 },
pages = { 23-29 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume172/number8/28272-2017915194/ },
doi = { 10.5120/ijca2017915194 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-07T00:19:48.496325+05:30
%A Vivek Mishra
%A Vivek Kumar Modanwal
%T Low Power Wide Fan-in Control Pulse Operated Domino Multiplexor with Static Switching
%J International Journal of Computer Applications
%@ 0975-8887
%V 172
%N 8
%P 23-29
%D 2017
%I Foundation of Computer Science (FCS), NY, USA
Abstract

In wide fan-in domino multiplexors, significant power losses are introduced due to the high switching activity at both dynamic and output nodes. In this paper a multiplexor is proposed with static switching at both dynamic and output nodes. This technique has a control pulse generator circuit which turns on the pull up transistor conditionally for a short duration only. This technique is advanced than previously existing techniques as it has faster response over other existing techniques but lesser power consumption and lesser area required. Simulation is done using 0.18µm CMOS technology. Power consumption of proposed multiplexor is calculated and the results are compared with existing multiplexors for different loading condition, clock frequency and temperature. For capacitance 100 fF, proposed domino multiplexor circuit reduces power consumption by 81.08%, 17.57% and 25.50% as compared to standard footless domino, SP-Domino and SSPD multiplexors.

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Index Terms

Computer Science
Information Sciences

Keywords

Multiplexor Domino logic Dynamic circuits Low power Switching activity.

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