CFP last date
20 January 2025
Reseach Article

PFPS: Parallel File Protecting System

by Sheetal Adagale, Trupti Zanje, Aishwarya Sawant, Pratiksha Pandagale, Kanchan M. Varpe
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 169 - Number 8
Year of Publication: 2017
Authors: Sheetal Adagale, Trupti Zanje, Aishwarya Sawant, Pratiksha Pandagale, Kanchan M. Varpe
10.5120/ijca2017914709

Sheetal Adagale, Trupti Zanje, Aishwarya Sawant, Pratiksha Pandagale, Kanchan M. Varpe . PFPS: Parallel File Protecting System. International Journal of Computer Applications. 169, 8 ( Jul 2017), 17-21. DOI=10.5120/ijca2017914709

@article{ 10.5120/ijca2017914709,
author = { Sheetal Adagale, Trupti Zanje, Aishwarya Sawant, Pratiksha Pandagale, Kanchan M. Varpe },
title = { PFPS: Parallel File Protecting System },
journal = { International Journal of Computer Applications },
issue_date = { Jul 2017 },
volume = { 169 },
number = { 8 },
month = { Jul },
year = { 2017 },
issn = { 0975-8887 },
pages = { 17-21 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume169/number8/28004-2017914709/ },
doi = { 10.5120/ijca2017914709 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-07T00:16:50.701489+05:30
%A Sheetal Adagale
%A Trupti Zanje
%A Aishwarya Sawant
%A Pratiksha Pandagale
%A Kanchan M. Varpe
%T PFPS: Parallel File Protecting System
%J International Journal of Computer Applications
%@ 0975-8887
%V 169
%N 8
%P 17-21
%D 2017
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Nowadays everything is digitized. We share information on network, even confidential information also get transferred in the form of files. So it require protection of data against corruption and fault tolerance. This needs secure and efficient way to protect private data from illegle usage. For that purpose we have proposed Parallel File protecting System using CPP (CPU Parallel protecting), CPUP (CPU Parallel Unprotecting), GPP(GPU Parallel Protecting), GPUP(GPU Parallel Unprotecting), HPP(Hybrid Parallel Protecting), HPUP (Hybrid Parallel Unprotecting) which secures file with the help of SHA3, AES and BLAKE2b algorithm. In proposed system we optimized SHA3-256 and parallel AES algorithm for security purpose with GPU Parallelism and CPU Parallelism for high performance. Parallelism is achieved with the help of NVIDIA’s GPU. Along with SHA3 Blake2b is used for fast secure hashing. We have achieved better speed and security with the help of Blake2b. Thus Parallel File Protecting System is secure system and it can be used in computer equipped with NVIDIA’s GPU.

References
  1. Xiongwei Fei , Kenli Li , Wangdong Yang , Keqin Li,A secure and efficient file protecting system based on SHA3 and parallel AES,Parallel Computing 52(2016) 106-132
  2. .X. Shi, F. Park, L. Wang, J. Xin, Y. Qi, Parallelization of a color-entropy preprocessed chan-vese model for face contour detection on multi-core cpu and gpu, Parallel Comput. 49 (2015) 2849.
  3. K. Li, J. Liu, L. Wan, S. Yin, K. Li, A cost-optimal parallel algorithm for the 01 knapsack problem and its performance on multicore cpu and gpu implementations, Parallel Comput. 43 (2015) 2742.
  4. .K. Li, W. Yang, K. Li, Performance analysis and optimization for SPMV on GPU using probabilistic modeling, IEEE Trans. Parallel Distrib. Syst. 26 (1) (2014) 196205.
  5. A. Pousa, V. Sanz, A. de Giusti, Performance analysis of a symmetric cryptographic algorithm on multicore architectures , in: Computer Science Technology Series-XVII Argentine Congress of Computer Science-Selected Papers, Edulp, 2012, pp. 5766.
  6. Hoang-Vu Dang, Bertil Schmidt ,The Sliced COO Format for Sparse MatrixVector Multiplication on CUDA-enabled GPUs computing,2011 W. D. Doyle, “Magnetization reversal in films with biaxial anisotropy,” in Proc. 1987 INTERMAG Conf., 1987, pp. 2.2-1-2.2-6.
  7. Marcin Krotkiewski , 2011 , perfomance study of our CUDA based implementation of the symmetric 7-point and 27-point ,and the general 27-point stencil( 3 3 3 convolution) for modern GPUs,2011
  8. C. Mei, H. Jiang, J. Jenness, CUDA-based AES parallelization with fine-tuned GPU memory utilization, in: 2010 IEEE International Symposium on Parallel Distributed Processing, Workshops and Phd Forum (IPDPSW), IEEE, 2010, pp. 17.
  9. S.A. Manavski, CUDA compatible GPU as an efficient hardware accelerator for AES cryptography, in: IEEE International Conference on Signal Processing and Communications, 2007 (ICSPC07), IEEE, 2007, pp. 6568.
  10. M. Biglari, E. Qasemi, B. Pourmohseni, Maestro: A high performance AES encryption/decryption system, in: 2013 17th CSI International Symposium on Computer Architecture and Digital Systems (CADS), IEEE, 2013, pp. 876-880. Available:
  11. Kenli Li, Wangdong Yang, and Keqin Li, Senior Member, IEEE Performance optimization using partitioned SpMV on GPUs and multicore CPUs,IEEE Transactions on Computers 64(9):2623-2636 September 2015.
  12. A. Mohd, Y. Jararweh, L.A. Tawalbeh, Aes-512: 512-bit advanced encryption standard algorithm design and evaluation, in: IAS, IEEE, 2011, pp. 292297.
  13. B. Liu, B.M. Baas, Parallel aes encryption engines for many-core processor arrays, IEEE Trans. Comput. 62 (3) (2013) 536547.
  14. J. Diaz, C. Munoz-Caro, A. Nino, A survey of parallel programming models and tools in the multi and many-core era, IEEE Trans. Parallel Distrib. Syst.23 (8) (2012) 13691386.
  15. T. Nhat-Phuong, L. Myungho, H. Sugwon, L. Seung-Jae, High throughput parallelization of AES-CTR algorithm, IEICE Trans. Inform. Syst. 96 (8) (2013)16851695.
  16. Q. Dong, J. Zhang, L. Wei, A sha-3 based rfid mutual authentication protocol and its implementation, in: 2013 IEEE International Conference on Signal Processing, Communication and Computing (ICSPCC), IEEE, 2013, pp. 15
  17. N. Moreira, A. Astarloa, U. Kretzschmar, Sha-3 based message authentication codes to secure IEEE 1588 synchronization systems, in: 39th Annual Conference of the IEEE on Industrial Electronics Society (IECON13), IEEE, 2013, pp. 23232328.
  18. J.S. Banu, M. Vanitha, J. Vaideeswaran, S. Subha, Loop parallelization and pipelining implementation of AES algorithm using OpenMP and FPGA, in:2013 International Conference on Emerging Trends in Computing, Communication and Nanotechnology (ICE-CCN), IEEE, 2013, pp. 481485
  19. X. Shi, F. Park, L. Wang, J. Xin, Y. Qi, Parallelization of a color-entropy preprocessed chan-vese model for face contour detection on multi-core cpu and gpu, Parallel Comput. 49 (2015) 2849.
  20. C. JunLi, Q. Dinghu, Y. Haifeng, Z. Hao, M. Nie, Email encryption system based on hybrid aes and ecc, in: IET International Communication Conference on Wireless Mobile and Computing (CCWMC11), IET, 2011, pp. 347350
  21. A.Mohd, Y.Jararweh, L.A.Tawalbeh, Aes-512:512-bit advanced encryption standard algorithm design and evaluation,in:IAS,IEEE,2011,pp.292297.
  22. P.Maistri, F.Masson, R.Leveugle, Implementation of the advanced encryptio standard on gpus with the nvidia cuda framework,in:2011 IEEE Symposiumon Industrial Electronics and Applications (ISIEA), IEEE, 2011, pp.213217.
  23. C.-L.Duta, G.Michiu, S.Stoica, L.Gheorghe, Accelerating encryption algorithms using parallelism, in: 2013 19th International Conference on Control Systems and Computer Science (CSCS), IEEE, 2013, pp.549554.
Index Terms

Computer Science
Information Sciences

Keywords

Deduplication integrity checking protecting unprotecting etc.