International Journal of Computer Applications |
Foundation of Computer Science (FCS), NY, USA |
Volume 159 - Number 3 |
Year of Publication: 2017 |
Authors: Sanjay S. Chopade, Dinesh V. Padole |
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Sanjay S. Chopade, Dinesh V. Padole . Comparative Analysis of 4x4 Vedic and Conventional Multiplier with different Adders at 32 nm Technology. International Journal of Computer Applications. 159, 3 ( Feb 2017), 24-31. DOI=10.5120/ijca2017912888
Processor speed largely governed by the multiplier architectures. It is desired to have faster ALU with lower power consumption for portable applications to have good battery life. Hence, there is need to address different multiplier architectures. In this paper, the analysis of 4-bit multiplier using a Vedic Mathematics (Urdhva Tiryagbhyam sutra) and conventional multiplier with two different adders has been realized using carry look ahead adder and ripple carry adder. Comparative study of multipliers is done for low power requirement and high speed. The main purpose of the paper is to investigate the better adder and multiplication technique. It is observed that the conventional multiplier with CLA adder is more stable and power efficient. Conventional multiplier with CLA adder is having 117 % less energy delay product than Vedic with RCA adder, 62.0 % less than CLA based Vedic multiplier and 30.7 % less than conventional multiplier with RCA adder at supply voltage 0.9 V. Conventional multiplier with CLA adder is good over RCA adder based multiplier