International Journal of Computer Applications |
Foundation of Computer Science (FCS), NY, USA |
Volume 153 - Number 1 |
Year of Publication: 2016 |
Authors: G. Lakshmi Prasanna, S. Ravi Chand |
10.5120/ijca2016911955 |
G. Lakshmi Prasanna, S. Ravi Chand . High Performance RISC based 2D-DWT Architecture Implementation for Jpeg 2000. International Journal of Computer Applications. 153, 1 ( Nov 2016), 48-52. DOI=10.5120/ijca2016911955
In this paper a 2D-DWT architecture can be implemented using 5/3 lifting scheme. The 2D-DWT is used in many fields, they are signal analysis, computer vision, object recognition, image compression and video compression. The DWT is developed by the JPEG2000 which is the one of image compression standard based on the wavelet coding techniques. The proposed architecture is RISC based architecture. The RISC processor has simple instruction set and gives high performance. The 5/3 lifting scheme is used to implement these architecture, which performs predict and update steps. The main objective of the project is to implement RISC based 2D-DWT architecture for processing images with high compression ratio’s[i.e. limited size and better quality] compared to DCT which is one of the transform used in image compression.