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Reseach Article

Efficient Reversible ALU based on Logic Gate Structure

by Aanchal Shukla, Minal Saxena
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 150 - Number 2
Year of Publication: 2016
Authors: Aanchal Shukla, Minal Saxena
10.5120/ijca2016911469

Aanchal Shukla, Minal Saxena . Efficient Reversible ALU based on Logic Gate Structure. International Journal of Computer Applications. 150, 2 ( Sep 2016), 32-36. DOI=10.5120/ijca2016911469

@article{ 10.5120/ijca2016911469,
author = { Aanchal Shukla, Minal Saxena },
title = { Efficient Reversible ALU based on Logic Gate Structure },
journal = { International Journal of Computer Applications },
issue_date = { Sep 2016 },
volume = { 150 },
number = { 2 },
month = { Sep },
year = { 2016 },
issn = { 0975-8887 },
pages = { 32-36 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume150/number2/26068-2016911469/ },
doi = { 10.5120/ijca2016911469 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T23:54:52.451308+05:30
%A Aanchal Shukla
%A Minal Saxena
%T Efficient Reversible ALU based on Logic Gate Structure
%J International Journal of Computer Applications
%@ 0975-8887
%V 150
%N 2
%P 32-36
%D 2016
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Reversible circuits are like routine rationale circuits with the exception of that they are worked from reversible doors. In reversible entryways, there is a novel, balanced mapping between the inputs furthermore, yields, not the situation with customary rationale. Likewise, reversible doors require steady ancilla inputs for reconfiguration of door capacities and waste yields that assistance in keeping reversibility. In this paper we have implemented reversible arithmetic logic unit (RALU) consist of F, Fr, HNG and PAOG Gate. In this design consumed of 24 costs and 11 delays. In this design be calculate seven logical operations: ADD, SUB, OR, NOR, NOT, NAND and AND. All design is simulated in Xilinx 14.2i and synthesis result in different device family.

References
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Index Terms

Computer Science
Information Sciences

Keywords

Reversible Gates Arithmetic Unit (ALU) Garbage Output Quantum Cost