CFP last date
20 January 2025
Call for Paper
February Edition
IJCA solicits high quality original research papers for the upcoming February edition of the journal. The last date of research paper submission is 20 January 2025

Submit your paper
Know more
The week's pick
Responsive image
SFLA-Based Line Balancing and Task Optimization in Master-Slave Controlled Hanger Transportation Systems for Garment Production

Duc Hoang Nguyen
Random Articles
Reseach Article

Universal Filter Design using 45nm CMOS-based DDCC for Bluetooth/ Zigbee Applications

by Jyoti Sharma, Anchal Sharma
journal cover thumbnail

International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 134 - Number 13
Year of Publication: 2016
Authors: Jyoti Sharma, Anchal Sharma
10.5120/ijca2016908186

Jyoti Sharma, Anchal Sharma . Universal Filter Design using 45nm CMOS-based DDCC for Bluetooth/ Zigbee Applications. International Journal of Computer Applications. 134, 13 ( January 2016), 36-40. DOI=10.5120/ijca2016908186

@article{ 10.5120/ijca2016908186,
author = { Jyoti Sharma, Anchal Sharma },
title = { Universal Filter Design using 45nm CMOS-based DDCC for Bluetooth/ Zigbee Applications },
journal = { International Journal of Computer Applications },
issue_date = { January 2016 },
volume = { 134 },
number = { 13 },
month = { January },
year = { 2016 },
issn = { 0975-8887 },
pages = { 36-40 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume134/number13/23978-2016908186/ },
doi = { 10.5120/ijca2016908186 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T23:34:10.085793+05:30
%A Jyoti Sharma
%A Anchal Sharma
%T Universal Filter Design using 45nm CMOS-based DDCC for Bluetooth/ Zigbee Applications
%J International Journal of Computer Applications
%@ 0975-8887
%V 134
%N 13
%P 36-40
%D 2016
%I Foundation of Computer Science (FCS), NY, USA
Abstract

The limited performance of voltage mode Op-amps such as bandwidth, slew-rate etc. led the analog designer to search for other possibilities and other building blocks. Thus the current-mode active building blocks received considerable attention due to their larger dynamic range, high frequency, lower power consumption, high slew rate, better linearity, better accuracy and higher bandwidth. In this paper, a universal filter has been designed using Differential Difference Current Conveyor (DDCC) as an active building block. The filter provide low pass, high pass and band pass responses. The filter is also tuned for Zigbee and Bluetooth standards. The filter offers high bandwidth. The circuit implemented using DDCC provide non-interactive frequency control and employ only the grounded capacitors. The performance of the circuit is confirmed from HSPICE simulation results.

References
  1. P.E. Allen and D.R. Holberg, “CMOS Analog Circuit Design”, New York: Oxford University Press, 2002.
  2. David A. Johns and Ken Martin, “Analog Integrated Circuit Design”, WileyIndia Pvt. Ltd., 1997.
  3. K. Bult, “Analog design in deep sub-micron CMOS”, Proc. European Solid-State Conf, pages pp. 126-132, 2001.
  4. J. R. Angulo, R.G. Carvajal, and A. L. Martin, “Techniques for the design of low voltage power efficient analog and mixed signal circuits”, 22nd International Conference on VLSI Design, Vol. 26, No. 27:pp. 5-9, Jan. 2009.
  5. Lattenberg and Vrba, “Filters with current amplifiers for high-speed communication”, International Conference on Systems and Mobile Communications and Learning Technologies, Vol. 150, No. 150:pp. 23-29, Apr. 2006.
  6. H. H. Kuntman and A. Uygur, “New possibilities and trends in circuit design for analog signal processing”, International Conference on Applied Electronics, Vol. 1, No. 9:pp. 5-7, Sept. 2012.
  7. K. C. Smith and A. S. Sedra, “The current conveyor- a new building block”, Proc. of the IEEE, Vol. 56, No. 8:pp. 1368-1369, Aug. 1968.
  8. I. P. Singh, K. Singh, and S. N. Shukla, “Current conveyor: novel universal active block” Samriddhi-Journal of Physical Sciences, Engineering Technology,Vol. 1, Issue 1, 2010.
  9. F S Gohn A Sedra, G Robert, “The current conveyor: history and progress”, IEEE International Symp. on Circuits and Systems, Portland, USA, 3:1567-1570, 1989.
  10. Ahmed M. Soliman El-Adawy, Ahmed A. and Hassan O. Elwan.A, “A novel fully differential current conveyor and applications for analog VLSI”, Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions, 4: 306-313, 2000.
  11. H. O. Elwan Alzaher, H. A. and Mohammed Ismail, “CMOS fully differential second-generation current conveyor”, Electronics Letters 36.13, pages 1095- 1096, 2000.
  12. H. O. Elwan and A. M. Soliman, “Novel CMOS differential voltage current conveyor and its applications in Circuits, Devices and Systems”, IEE Proceedings, 144-3:195-200, 1997.
  13. S-I. Liu H-W. Tsao Chiu, Wenwei and J-J. Chen, “CMOS differential difference current conveyors and their applications”, IEE Proceedings-Circuits, Devices and Systems, 143-2:91-96, 1996.
  14. R S Pande R V Yenkar and S S Limaye, “Design and implementation of different generations of current conveyor using 100nm CMOS technology”, International Journal of Recent Development in Engineering and Technology(IJRDET Online), 2-3:131-136, 2014.
  15. S. Rana and K. Pal, “Current conveyor simulation circuits using operational amplifiers”, Journal of Physical Sciences, Vol. 11:pp. 124-132, Aug. 2007.
  16. J. Sharma, M. S. Ansari, J. Sharma, “Current-mode electronically tunable resistor-less universal filter in 0.5v 32nm CNFET”, International Conference on Devices, Circuits and Communications (ICDCCom), 2014 (12-13 Sept. 2014) 1–6.
  17. J. Sharma, M. S. Ansari, J. Sharma, “Electronically tunable resistor-less universal filter in 0.5v 32nm CNFET”, Fifth International Symposium on Electronic System Design (ISED) (Dec. 2014) 206–207.
Index Terms

Computer Science
Information Sciences

Keywords

Current Mode Differential Difference Current Conveyor(DDCC) HSPICE Zigbee Bluetooth.

Powered by PhDFocusTM