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Implementation of a Single-Channel HDLC Controller on FPGA

by Hichem Semira, Mohamed Benouaret, Saliha Harize
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 131 - Number 3
Year of Publication: 2015
Authors: Hichem Semira, Mohamed Benouaret, Saliha Harize
10.5120/ijca2015907208

Hichem Semira, Mohamed Benouaret, Saliha Harize . Implementation of a Single-Channel HDLC Controller on FPGA. International Journal of Computer Applications. 131, 3 ( December 2015), 16-23. DOI=10.5120/ijca2015907208

@article{ 10.5120/ijca2015907208,
author = { Hichem Semira, Mohamed Benouaret, Saliha Harize },
title = { Implementation of a Single-Channel HDLC Controller on FPGA },
journal = { International Journal of Computer Applications },
issue_date = { December 2015 },
volume = { 131 },
number = { 3 },
month = { December },
year = { 2015 },
issn = { 0975-8887 },
pages = { 16-23 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume131/number3/23429-2015907208/ },
doi = { 10.5120/ijca2015907208 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T23:26:18.070033+05:30
%A Hichem Semira
%A Mohamed Benouaret
%A Saliha Harize
%T Implementation of a Single-Channel HDLC Controller on FPGA
%J International Journal of Computer Applications
%@ 0975-8887
%V 131
%N 3
%P 16-23
%D 2015
%I Foundation of Computer Science (FCS), NY, USA
Abstract

HDLC are the high level data link control procedures established by ISO, They are widely used in digital communication and are the bases of many other data link control protocols. The objective of this paper is to implement a Single-Channel HDLC Controller on an Altera FPGA. All the modules such as the transmitter and the receiver are designed and implemented using VHDL programming language and illustrated with a detailed schema. The software tools used in this work include Altera Quartus II 8.1 and ModelSim Altera 6.1g. The target circuit is the Cyclone II EP2C35F672C6.

References
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Index Terms

Computer Science
Information Sciences

Keywords

HDLC Data Link Control Layer Altera FPGA bit stuffing/unstuffing CRC-16 CRC-32 Flag.

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