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Low Offset and High Slew Rate Buffer amplifier for LCD Application

by Ranjana Kumara Mishra, Teena Raikwar
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 131 - Number 16
Year of Publication: 2015
Authors: Ranjana Kumara Mishra, Teena Raikwar
10.5120/ijca2015907256

Ranjana Kumara Mishra, Teena Raikwar . Low Offset and High Slew Rate Buffer amplifier for LCD Application. International Journal of Computer Applications. 131, 16 ( December 2015), 45-51. DOI=10.5120/ijca2015907256

@article{ 10.5120/ijca2015907256,
author = { Ranjana Kumara Mishra, Teena Raikwar },
title = { Low Offset and High Slew Rate Buffer amplifier for LCD Application },
journal = { International Journal of Computer Applications },
issue_date = { December 2015 },
volume = { 131 },
number = { 16 },
month = { December },
year = { 2015 },
issn = { 0975-8887 },
pages = { 45-51 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume131/number16/23692-2015907256/ },
doi = { 10.5120/ijca2015907256 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T23:27:36.148980+05:30
%A Ranjana Kumara Mishra
%A Teena Raikwar
%T Low Offset and High Slew Rate Buffer amplifier for LCD Application
%J International Journal of Computer Applications
%@ 0975-8887
%V 131
%N 16
%P 45-51
%D 2015
%I Foundation of Computer Science (FCS), NY, USA
Abstract

The proposed buffer achieves low offset and high slew rate in proposed circuit NMOS folded cascode operation amplifier is used instead of rail to rail operation amplifier, use of only NMOS folded cascode operation amplifier reduces the number of MOS used in circuit and using auto zero negative feedback will provide full swing for positive and negative feedback polarity pixel, and to decrease the offset a current distributed load is used which increases DC gain of operational amplifier and as DC gain increases it reduces offset voltage and increases slew rate with same bias current used in folded and summing stage of operational amplifier. The proposed circuit is simulated and verified in LT-spice and Microwind simulation tool using 350nm CMOS TSMC foundry with 3.3 V supply voltage the offset calculated is around .2mV and slew rate is 14V/µs.

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Index Terms

Computer Science
Information Sciences

Keywords

LCA Buffer Amplifier

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