International Journal of Computer Applications |
Foundation of Computer Science (FCS), NY, USA |
Volume 126 - Number 1 |
Year of Publication: 2015 |
Authors: Varinder Singh, Narinder Sharma |
10.5120/ijca2015905967 |
Varinder Singh, Narinder Sharma . Improving Performance Parameters of Error Detection and Correction in HDLC Protocol by using Hamming Method. International Journal of Computer Applications. 126, 1 ( September 2015), 1-7. DOI=10.5120/ijca2015905967
This senate proposes an optimize version of the Hamming codes for Error detection and correction (EDAC) used in the HDLC protocol as HDLC being the most enduring and fundamental standard in communication. When data is either stored in memory or transmitted through a communication channel it is not errorless. With the exposure to electromagnetic radiation the semiconductor memory which are used in various applications get damaged .Because of electromagnetic interference the contents of the RAM memory cells get affected which leads to the bit flip in the magnetic storage devices like floppy disk, magnetic tape and hard disk devices etc. A proposed method has been developed to overcome the existing problems by using Xilinx ISE 13.2 simulator tool through which number of bit errors detection and correction can be increased in 8x8 matrix .It will result into enhancement of code rate and reduction of bit overhead.