We apologize for a recent technical issue with our email system, which temporarily affected account activations. Accounts have now been activated. Authors may proceed with paper submissions. PhDFocusTM
CFP last date
20 December 2024
Reseach Article

Implementation of Complex Matrix Inversion using Gauss-Jordan Elimination Method in Verilog

by P.venkata Rao, K.r.k.sastry
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 122 - Number 3
Year of Publication: 2015
Authors: P.venkata Rao, K.r.k.sastry
10.5120/21678-4768

P.venkata Rao, K.r.k.sastry . Implementation of Complex Matrix Inversion using Gauss-Jordan Elimination Method in Verilog. International Journal of Computer Applications. 122, 3 ( July 2015), 6-9. DOI=10.5120/21678-4768

@article{ 10.5120/21678-4768,
author = { P.venkata Rao, K.r.k.sastry },
title = { Implementation of Complex Matrix Inversion using Gauss-Jordan Elimination Method in Verilog },
journal = { International Journal of Computer Applications },
issue_date = { July 2015 },
volume = { 122 },
number = { 3 },
month = { July },
year = { 2015 },
issn = { 0975-8887 },
pages = { 6-9 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume122/number3/21678-4768/ },
doi = { 10.5120/21678-4768 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T23:09:35.412631+05:30
%A P.venkata Rao
%A K.r.k.sastry
%T Implementation of Complex Matrix Inversion using Gauss-Jordan Elimination Method in Verilog
%J International Journal of Computer Applications
%@ 0975-8887
%V 122
%N 3
%P 6-9
%D 2015
%I Foundation of Computer Science (FCS), NY, USA
Abstract

It gives the architecture of an optimized complex matrix inversion using GAUSS-JORDAN (GJ) elimination in Verilog with single precision floating-point representation. The GJ-elimination algorithm uses a single precision floating point arithmetic components and control unit for performing necessary arithmetic operations. The proposed architecture implements the GJ-elimination algorithm for complex matrix element sequentially. Matrix inversion using GJ-elimination improves the frequency when compared with QR Decomposition algorithm. The design is targeted on XC5VLX50T Xilinx FPGA.

References
  1. Marjan Karkooti, Joseph R. Cavallaro,"FPGA Implementation Of Matrix Inversion Using QRD-RLS algorithm", IEEE, 2005.
  2. Davide Cescato, Moritz Borgmann, Helmut Bölcskei, Jan Hansen, and Andreas Burg," Interpolation-based QR decomposition in MIMO-OFDM systems," IEEE Workshop on Signal Processing Advances in Wireless Communications- SPAWC, 2005.
  3. Zheng-Yu Huang and pei-Yun Tsai," Efficient Implementation of QR Decomposition for Gigabit MIMO-OFDM systems," IEEE Trans. on circuits and systems, October 2011.
  4. Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan Kastner," An FPGA Design Space Exploration Tool for Matrix Inversion Architectures," SASP 2008.
  5. Janier Arias-Garc? ia, Ricardo Pezzuol Jacobi, Carlos H. Llanos, Mauricio Ayala-Rinc? on," A suitable FPGA implementation of floating point matrix inversion based on Gauss-Jordan Elimination," 2011 vii southern conference on programmable logic (SPL), April 2011.
  6. A. Burian, J. Takala and M. Ylinen, "A fixed point implementation of matrix inversion using Cholesky decomposition," Micro-NanoMechatronics and Human Science, 2003 IEEE International Symposium on,vol. 3,pp. 1431-1434 Vol. 3, 27-30 Dec. 2003.
  7. A. Happonen, O. Piirainen and A. Burian, "GSM channel estimator using a fixed point matrix inversion algorithm," Signals, Circuits and Systems, 2005. ISSCS 2005. International Symposium on , vol. 1, no. , pp. 119-122 Vol. 1, 14-15 July 2005.
Index Terms

Computer Science
Information Sciences

Keywords

Matrix inversion Gauss-Jordan Elimination Floating Point and True Dual Port RAM