CFP last date
20 January 2025
Reseach Article

An Introduction to Functional Verification of I2C Protocol using UVM

by Deepa Kaith, Janakkumar B. Patel, Neeraj Gupta
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 121 - Number 13
Year of Publication: 2015
Authors: Deepa Kaith, Janakkumar B. Patel, Neeraj Gupta
10.5120/21599-4703

Deepa Kaith, Janakkumar B. Patel, Neeraj Gupta . An Introduction to Functional Verification of I2C Protocol using UVM. International Journal of Computer Applications. 121, 13 ( July 2015), 10-14. DOI=10.5120/21599-4703

@article{ 10.5120/21599-4703,
author = { Deepa Kaith, Janakkumar B. Patel, Neeraj Gupta },
title = { An Introduction to Functional Verification of I2C Protocol using UVM },
journal = { International Journal of Computer Applications },
issue_date = { July 2015 },
volume = { 121 },
number = { 13 },
month = { July },
year = { 2015 },
issn = { 0975-8887 },
pages = { 10-14 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume121/number13/21599-4703/ },
doi = { 10.5120/21599-4703 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T23:08:19.125201+05:30
%A Deepa Kaith
%A Janakkumar B. Patel
%A Neeraj Gupta
%T An Introduction to Functional Verification of I2C Protocol using UVM
%J International Journal of Computer Applications
%@ 0975-8887
%V 121
%N 13
%P 10-14
%D 2015
%I Foundation of Computer Science (FCS), NY, USA
Abstract

The fabrication technology advancements lead to place more logic on a silicon die which makes verification more challenging task than ever. The large number of resources is required because more than 70% of the design cycle is used for verification. Universal Verification Methodology was developed to provide a well structured and reusable verification environment which does not interfere with the device under test (DUT). This paper contrasts the reusability of I2C using UVM and introduces how the verification environment is constructed and test cases are implemented for this protocol.

References
  1. Philips Semiconductor, version 2. 1 January 2000. I2C-bus specification and user manual.
  2. F. Leens, February 2009. An Introduction to I2C and SPI Protocols, IEEE Instrumentation & Measurement Magazine, pp. 8-13,
  3. Mulani P. , Patoliya J. , Patel H. , Chauhan D. , "Verification of I2C DUT using SystemVerilog", International Journal of Advanced Engineering Technology, Vol. 1, No. 3, pp 130-134, Oct. -Dec 2010.
  4. An Accellera Organization, June 2011. Universal Verification Methodology (UVM) 1. 1 Class Reference.
  5. Glasser M. , February 4, 2011. UVM: The Next Generation in Verification Methodology, Methodology Architect, Courtesy of Mentor Graphics Corporation.
  6. Young-Nam Yun, Jae-Beom Kim, Nam-Do Kim, Byeong Min, 2011. Beyond UVM for practical Soc Verification, IEEE- 978-1-4577-0711-7, pp 158-162.
  7. NXP Semiconductors, 2012. I2C-bus specification and user manual.
  8. Juan Francesconi, J. Agustin Rodriguez, Pedro M. Julian, 2014. UVM Based Testbench Architecture for Unit Verification. ISBN: 978-987-1907-86-1 IEEE Catalog Number CFP1454E-CDR.
  9. T Tarun Kumar, CY Gopinath, June 2014. Verification of I2C Master Core using System Verilog-UVM International Journal of Science and Research (IJSR), ISSN - 2319-7064, Volume 3 Issue 6.
  10. Alexander W. Rath, Volkan Esen and Wolfgang Ecker, 2014. A Transaction-Oriented UVM-Based Library for Verification of Analog Behavior, IEEE- 978-1-4799-2816-3, pp 806-811.
  11. Deepa Kaith, Janankkumar B. Patel, Neeraj Gupta, "An Implementation of I2C Slave Interface using Verilog HDL", Internatioal Journal of Modern Engineering Research, ISSN: 2249-6645, Vol. 5, Issue 3, pp 55-60, March 2015.
Index Terms

Computer Science
Information Sciences

Keywords

Inter Integrated circuit Verification environment Universal Verification Methodology intellectual property DUT