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Low Power 10T XOR based 1 Bit Full Adder
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 121 - Number 1 |
| Year of Publication: 2015 |
| Authors: Dhyanendra Singh Chandel, Sachin Bandewar, Anand Kumar Singh |
10.5120/21503-4019
|
Dhyanendra Singh Chandel, Sachin Bandewar, Anand Kumar Singh . Low Power 10T XOR based 1 Bit Full Adder. International Journal of Computer Applications. 121, 1 ( July 2015), 13-16. DOI=10.5120/21503-4019
Abstract
The popularity and necessity of portable electronic systems by users have strongly influenced VLSI designers to make great effort for reduced silicon area, improved speeds, long duration battery life, and great reliability. The VLSI designers always try to save power consumption while designing a system. In this paer, an efficient methodology is presented to improve the output swing level of GDI gates. New designs of GDI based basic digital (AND, OR, XOR, XNOR) gates are presented using single pass transistors to improve swing level of GDI gates. The new design of basic gates with combination of GDI logic and pass transistor logic is called hybrid GDI technique. Compared to existing GDI technique with buffer restoration circuits, hybrid GDI implementation provides full swing output voltage in all digital circuits. Also it shows less power and less delay with about 60% area increase as compared to basic GDI.
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