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A Novel VLSI Architecture for Reversible ALU Logic Gate Structure

by Suman Yadav, Manish Saxena
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 120 - Number 2
Year of Publication: 2015
Authors: Suman Yadav, Manish Saxena
10.5120/21196-3861

Suman Yadav, Manish Saxena . A Novel VLSI Architecture for Reversible ALU Logic Gate Structure. International Journal of Computer Applications. 120, 2 ( June 2015), 1-3. DOI=10.5120/21196-3861

@article{ 10.5120/21196-3861,
author = { Suman Yadav, Manish Saxena },
title = { A Novel VLSI Architecture for Reversible ALU Logic Gate Structure },
journal = { International Journal of Computer Applications },
issue_date = { June 2015 },
volume = { 120 },
number = { 2 },
month = { June },
year = { 2015 },
issn = { 0975-8887 },
pages = { 1-3 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume120/number2/21196-3861/ },
doi = { 10.5120/21196-3861 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T23:05:09.330887+05:30
%A Suman Yadav
%A Manish Saxena
%T A Novel VLSI Architecture for Reversible ALU Logic Gate Structure
%J International Journal of Computer Applications
%@ 0975-8887
%V 120
%N 2
%P 1-3
%D 2015
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Programmable reversible logic is emerging as a prospective logic design style for implementation in modern nanotechnology and quantum computing with minimal impact on circuit heat generation. Recent advances in reversible logic using and quantum computer algorithms allow for improved computer architecture and arithmetic logic unit designs. In this paper, the design reversible ALU based on different types of reversible gate used with minimal delay, and may be configured to produce a variety of logical calculations. The proposed reversible ALU based on DKG gates is verified and its advantages over the only existing adder design are quantitatively analyzed. The proposed design is synthesized using Xilinx ISE software and simulated using VHDL test bench.

References
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Index Terms

Computer Science
Information Sciences

Keywords

Reversible Gates Reversible ALU based on PFAG Gate Garbage Output Quantum Cost

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