International Journal of Computer Applications |
Foundation of Computer Science (FCS), NY, USA |
Volume 120 - Number 18 |
Year of Publication: 2015 |
Authors: Shrita G, A R Aswatha |
10.5120/21327-4285 |
Shrita G, A R Aswatha . Design and Implementation of an Efficient 4G Digital down Converter used in Wireless Receiver Systems. International Journal of Computer Applications. 120, 18 ( June 2015), 17-20. DOI=10.5120/21327-4285
A Digital Down Converter (DDC), which is basically used to convert an intermediate frequency (IF) signal to its baseband form, forms an integral part of wireless receivers. The major functional blocks of a DDC constitute a mixer, Numerically Controlled Oscillator (NCO) and an FIR filter chain. In this paper, an area efficient and high speed DDC has been designed and implemented. On comparison of the results with that of the existing methodology, the designed architecture achieves 44. 8% area efficiency and 80. 7% improvement in speed.