CFP last date
20 January 2025
Reseach Article

Improved Maximally Flat Wideband CIC Compensation Filter using Sharpening Technique

by Kalpana Devi, Rajesh Mehra
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 116 - Number 13
Year of Publication: 2015
Authors: Kalpana Devi, Rajesh Mehra
10.5120/20394-2689

Kalpana Devi, Rajesh Mehra . Improved Maximally Flat Wideband CIC Compensation Filter using Sharpening Technique. International Journal of Computer Applications. 116, 13 ( April 2015), 6-9. DOI=10.5120/20394-2689

@article{ 10.5120/20394-2689,
author = { Kalpana Devi, Rajesh Mehra },
title = { Improved Maximally Flat Wideband CIC Compensation Filter using Sharpening Technique },
journal = { International Journal of Computer Applications },
issue_date = { April 2015 },
volume = { 116 },
number = { 13 },
month = { April },
year = { 2015 },
issn = { 0975-8887 },
pages = { 6-9 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume116/number13/20394-2689/ },
doi = { 10.5120/20394-2689 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T22:57:00.116440+05:30
%A Kalpana Devi
%A Rajesh Mehra
%T Improved Maximally Flat Wideband CIC Compensation Filter using Sharpening Technique
%J International Journal of Computer Applications
%@ 0975-8887
%V 116
%N 13
%P 6-9
%D 2015
%I Foundation of Computer Science (FCS), NY, USA
Abstract

This paper presents the design and implementation of sharpening of maximally flat cascaded integrator comb compensation filters. The modified sharpened cascaded integrator comb compensation filter is used to improve magnitude response and gain. For wide-band compensation fourth-order linear phase filters is considered. The decimation factor of CIC filter is D and number of adders are depends upon decimation factor D. The compensation filter is a multiplier less design which works at low rate. The comparison within some methods reported in the literature is provided.

References
  1. E. B. Hogenauer, "An Economical Class of Digital Filters For Decimation and Interpolation", IEEE Transactions on Acoustics, Speech and Signal Processing, Volume 29, No. 2, pp: 155-162, 1981
  2. G. Stephen, R. W. Stewart, " High-Speed Sharpening of Decimating", Electronics Letters, Volume 40, No. 21, pp: 1383-1384, 2004
  3. G. Jovanovic Dolece, S. K. Mitra, "A New Two-Stage Sharpened Comb Decimator", IEEE Transactions on Circuits and Systems-I, Volume 52, No. 7, pp: 1414-1420, 2005
  4. Shlomo Engelberg, "A More General Approach to the Filter Sharpening Technique of Kaiser and Hamming", IEEE Transactions on Circuits and Systems- II, Volume 53, No. 7, pp: 538-540, 2006
  5. Gordana Jovanovic Dolecek, Naina Rao Nagrale, "On Multiplierless FIR Decimation Filter Design", IEEE Conference On Electronics, Circuits and Systems, pp: 967-970, 2007
  6. M. Laddomada, "Generalized Comb Decimator Filter for ?? A/D Converters: Analysis and Design", IEEE Transaction on Circuits and System-I, Volume 54, No. 5, pp: 994–1005, 2007
  7. Gordana Jovanovic Dolecek, Sanjit K. Mitra, "On Design of Two-Stage CIC Compensation Filter", IEEE International Symposium on Industrial Electronics, pp: 903-908, 2009
  8. G. Jovanovic Dolecek, "Simple Wideband CIC Compensator", IEEE Electronics Letters, Volume 45, No. 24, pp: 1270-1272, 2009.
  9. G. Jovanovic Dolecek, L. Dolecek, "Novel Multiplier less Wideband CIC Compensator", IEEE International Symposium on Circuits Systems, pp: 2119–2122, 2010
  10. Gordana Jovanovic Dolecek, Vlatko Dolecek, "Novel Sharpened Compensated Comb Decimator", International Research Conference on Trends in the Development of Machinery and Associated Technology, pp: 409-412, 2010
  11. Shiqian Zhang, Jing Qi, Jie Bao, "The Improvement of Design for CIC Compensation Filter", IEEE International Conference on Electronics Communication and Control, pp: 1712-1715, 2011
  12. Shiqian Zhang, Jing Qi, Jie Bao, "The Improvement of Design for CIC Compensation Filter", IEEE International Conference on Electronics Communication and Control, pp: 1712-1715, 2011
  13. Goran Molnar, Mladen Vucic, "Closed-form Design of CIC Compensators Based on Maximally Flat Error Criterion", IEEE Transactions on Circuits and Systems-II, Volume 58, No. 2, pp: 926-930, 2011
  14. Rajesh Mehra, Rashmi Arora, "FPGA-Based Design of High-Speed CIC Decimator for Wireless Applications", International Journal of Advanced Computer Science and Applications, Volume 2, No. 5, pp: 59-62, 2011
  15. Rajesh Mehra, Sumana Chatterjee, "FPGA Based Design of CIC Interpolator Using Embedded LUT Structure", ISP Journal of Electronics Engineering, Volume 1, Issue 1, pp: 1-4, 2011
  16. Fernandez-Vazquez, Alfonso, G. Jovanovic Dolecek, Maximally Flat CIC Compensation Filter: Design and Multiplierless Implementation", IEEE Transactions on Circuits and Systems-II, Volume 59, No. 2, pp: 113-117, 2012
  17. G. Molina Salgado, G. Jovanovic Dolecek, "Non-Recursive Comb Decimation Filter with an Improved Alias Rejection", IEEE Symposium on Circuits and Systems, pp: 1-4, 2012
  18. Rajesh Mehra, Lajwanti Singh, "FPGA Based Speed Efficient Decimator using Distributed Arithmetic Algorithm", International Journal of Computer Applications, Volume 80, No. 11, pp: 37-40, 2013
  19. Rajesh Mehra, S S Pattnaik, " Reconfigurable Design of GSM Digital Down Converter for Enhanced Resource Utilization", International Journal of Computer Applications, Volume 57, No. 11, pp: 41-47, 2013
  20. Suraj R. Gaikwad, Gopal S. Gawande, "Implementation of Efficient Multirate Filter Structure for Decimation", International Journal of Current Engineering and Technology, Volume 4, No. 2, pp: 1008-1010, 2014.
  21. Rajesh Mehra, Swapna Devi, "Efficient Hardware Co-Simulation of Down Convertor for Wireless Communication Systems", International Journal Of Vlsi Design & Communication Systems, Vol. 1, No. 2, 2010
  22. Rajesh Mehra, Shailly Verma, "FPGA Based Design of Direct Form FIR Polyphase Interpolator for Wireless Communication", International Journal of Electrical Electronics &Telecommunication Engineering, Vol. 44, Issue 1, pp. 1108- 1113, 2013
  23. Rajesh Mehra, Swapna Devi, "FPGA Based Design of High Performance Decimator using DALUT Algorithm", International Journal Of Signal and Image Processing, Vol. 1, No. 2, pp. 9-13, 2010
Index Terms

Computer Science
Information Sciences

Keywords

Cascaded Integrator Comb Filters Compensation Decimation Finite Impulse Response filter Sharpening