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Reseach Article

Design and Analysis of a Novel Ultra-Low Power SRAM Bit-Cell at 45nm CMOS Technology for Bio-Medical Implants

by Jyoti Yadav, Neeraj Kr Shukla, Pulkit Bhatnagar, Shilpi Birla
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 115 - Number 18
Year of Publication: 2015
Authors: Jyoti Yadav, Neeraj Kr Shukla, Pulkit Bhatnagar, Shilpi Birla
10.5120/20248-2615

Jyoti Yadav, Neeraj Kr Shukla, Pulkit Bhatnagar, Shilpi Birla . Design and Analysis of a Novel Ultra-Low Power SRAM Bit-Cell at 45nm CMOS Technology for Bio-Medical Implants. International Journal of Computer Applications. 115, 18 ( April 2015), 1-6. DOI=10.5120/20248-2615

@article{ 10.5120/20248-2615,
author = { Jyoti Yadav, Neeraj Kr Shukla, Pulkit Bhatnagar, Shilpi Birla },
title = { Design and Analysis of a Novel Ultra-Low Power SRAM Bit-Cell at 45nm CMOS Technology for Bio-Medical Implants },
journal = { International Journal of Computer Applications },
issue_date = { April 2015 },
volume = { 115 },
number = { 18 },
month = { April },
year = { 2015 },
issn = { 0975-8887 },
pages = { 1-6 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume115/number18/20248-2615/ },
doi = { 10.5120/20248-2615 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T22:55:10.944159+05:30
%A Jyoti Yadav
%A Neeraj Kr Shukla
%A Pulkit Bhatnagar
%A Shilpi Birla
%T Design and Analysis of a Novel Ultra-Low Power SRAM Bit-Cell at 45nm CMOS Technology for Bio-Medical Implants
%J International Journal of Computer Applications
%@ 0975-8887
%V 115
%N 18
%P 1-6
%D 2015
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Bio-Implantable Microsystems such as the cardiac pacemaker, retinal and neural implant provides substitute for a missing biological part, support an impaired biological structure or even upgrade the existing biological system. These microsystems require ultra-low power miniature integrated circuit technology for long term reliable operation. For energy constraint applications like the implantable devices, the performance requirement are secondary factors while energy efficiency, low power, high density and high robustness are of primary concern. For low power operation, scaling the supply voltage into sub-threshold region is possible and is an effective technique for power reduction. Implantable devices require minimum energy consumption and prolonged battery lifetime. So these systems demand low leakage currents without sacrificing much on performance. In this work a new 9T MTIP3 SRAM Bit-Cell is proposed at 45nm CMOS technology using multi-threshold (MTCMOS) design technique. The static power saving in MTIP3 is 99. 83% as compared to conventional 6T and 23. 82% as compared to IP3 at VDD=0. 8V. The dynamic power saving of read1 in MTIP3 is 86. 37% as compared to 6T. The dynamic power saving of write1 in MTIP3 is 66. 23% as compared to IP3. The access time of MTIP3 is 16. 94% less than 6T. The energy saving during hold mode in MTIP3 is 99. 5% as compared to 6T. Static Noise Margins are improved by 2. 07% compared to IP3 at VDD =0. 7V.

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Index Terms

Computer Science
Information Sciences

Keywords

6T SRAM Bio-Implants Microsystems MTIP3 SRAM Sub-threshold Region Voltage Scaling.