International Journal of Computer Applications |
Foundation of Computer Science (FCS), NY, USA |
Volume 114 - Number 4 |
Year of Publication: 2015 |
Authors: Shaik Shabeena, Jyotirmoy Pathak |
10.5120/19970-1846 |
Shaik Shabeena, Jyotirmoy Pathak . Design and Verification of Reversible Logic Gates using Quantum Dot Cellular Automata. International Journal of Computer Applications. 114, 4 ( March 2015), 39-42. DOI=10.5120/19970-1846
This paper portrays the designing of Reversible Logic gates through the use of Quantum Dot Cellular Automata (QCA) which is a nanotechnology concept and also a striking substitute for transistor based technologies. This technology helps us to rise above the confines of CMOS technology. It also gives better results in terms of digital and analog waveform, Quantum cost, garbage output. The fundamental logic in QCA is the logic state that does not compute with voltage level; rather it measures the polarity of electrons in a quantum cell. Basically Reversible logic gates are an essential building block of various computing system. Comparing with standard gates, the reversible logic gate lower the information bits use loss by reusing the logic information bits logically and realizes the goal of lowering power consumption of logic circuits. A QCAdesigner tool is used for simulation of different kinds of Reversible logic gates such as Toffoli gate, Fredkin gate and some others.