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Notes on “A Novel Conversion Scheme from a Redundant Binary Number to Two's Complement Binary Number for Parallel Architectures” proposed by Choo et.al.

by M S Chakraborty, T Ghosh, A C Mondal
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 103 - Number 5
Year of Publication: 2014
Authors: M S Chakraborty, T Ghosh, A C Mondal
10.5120/18068-9009

M S Chakraborty, T Ghosh, A C Mondal . Notes on “A Novel Conversion Scheme from a Redundant Binary Number to Two's Complement Binary Number for Parallel Architectures” proposed by Choo et.al.. International Journal of Computer Applications. 103, 5 ( October 2014), 5-7. DOI=10.5120/18068-9009

@article{ 10.5120/18068-9009,
author = { M S Chakraborty, T Ghosh, A C Mondal },
title = { Notes on “A Novel Conversion Scheme from a Redundant Binary Number to Two's Complement Binary Number for Parallel Architectures” proposed by Choo et.al. },
journal = { International Journal of Computer Applications },
issue_date = { October 2014 },
volume = { 103 },
number = { 5 },
month = { October },
year = { 2014 },
issn = { 0975-8887 },
pages = { 5-7 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume103/number5/18068-9009/ },
doi = { 10.5120/18068-9009 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T22:33:43.666322+05:30
%A M S Chakraborty
%A T Ghosh
%A A C Mondal
%T Notes on “A Novel Conversion Scheme from a Redundant Binary Number to Two's Complement Binary Number for Parallel Architectures” proposed by Choo et.al.
%J International Journal of Computer Applications
%@ 0975-8887
%V 103
%N 5
%P 5-7
%D 2014
%I Foundation of Computer Science (FCS), NY, USA
Abstract

In this article, it is shown that although the reverse conversion scheme for binary signed-digit number system proposed by Choo et. al. can not support full parallelism; the rules on which it is based are correct. In this connection, a mathematical induction technique is used to validate the decomposition rules. Accordingly, it can be inferred that the reverse conversion scheme for binary signed-digit number system proposed by Veeramachaneni et. al. works correctly and performs reverse conversion in ? (log n) time, where, n is the input size. As a consequence, the scheme by Veeramachaneni et. al. need to be considered as a potential contender of the more recent schemes for the same.

References
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  3. Chakraborty, M. S. and Sao, S. K. 2014. Comments on area-time efficient sign detection technique for binary signed-digit number system proposed by Srikanthan et. al. IJCA, USA. 88(15): 38-40.
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  9. Blair, G. M. 1998. The Equivalence of Two's-Complement Addition and the Conversion of Redundant Binary to Two's-Complement Numbers. IEEE Trans Circuits Syst I Fundam Theory Appl; 45(6): 669-671.
  10. Veeramachaneni, S. , Krishna, M. K. , Avinash, L. , Reddy, S. and Srinivas, M. B. 2007. High - Speed Redundant Binary to Binary Converter using Prefix Networks. Proc IEEE Intl Symp Circuits and Sys, Hyderabad, AP, India: 3271-3274
Index Terms

Computer Science
Information Sciences

Keywords

Reverse conversion scheme binary signed-digit number system parallelism validation comparative study.

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