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Comparative Analysis of Metastability with D FLIP FLOP in CMOS Circuits
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 103 - Number 16 |
| Year of Publication: 2014 |
| Authors: Manisha Thakur, Puran Gaur, Braj Bihari Soni |
10.5120/18160-9383
|
Manisha Thakur, Puran Gaur, Braj Bihari Soni . Comparative Analysis of Metastability with D FLIP FLOP in CMOS Circuits. International Journal of Computer Applications. 103, 16 ( October 2014), 26-29. DOI=10.5120/18160-9383
Abstract
The appropriate choice of flip-flop topologies is of essential importance in the design of integrated circuits for CMOS VLSI high-performance and high-speed circuits. The understanding of the suitability of the flip-flops and select the best topology for a given application is important to meet the need of the design to meet low power and high performance circuit subject. This work shows a wide area comparison exist in D flip-flop, this provides a wide study of the topologies in terms of power dissipation, delay, and rise delay and fall delay time.
References
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