The week's pick
Reseach Article
Efficient Methods for FFT calculations Using Memory Reduction Techniques.
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 1 - Number 27 |
| Year of Publication: 2010 |
| Authors: N. Kalaiarasi, A.Rathinam |
10.5120/488-799
|
N. Kalaiarasi, A.Rathinam . Efficient Methods for FFT calculations Using Memory Reduction Techniques.. International Journal of Computer Applications. 1, 27 ( February 2010), 118-122. DOI=10.5120/488-799
Abstract
FFT algorithms is one of the many methods used for the calculation of DFT, but they are preferred due to their increased speed and higher efficiency, which arises due to the fact that for the calculation of a N-point DFT, the sequence is broken into several segments and the DFT for each segment is calculated. However, for this many redundant memory spaces are required. The Butterfly structure for the calculation of DFT by FFT algorithms is preferred due to its symmetry which makes it suitable for hardware implementations, but this requires the loading of the twiddle factors for each stage repeatedly, which leads to inefficient use of memory space. To overcome this, grouping the identical twiddle factors of different stages together reduces the number of memory references and the storage space due to twiddle factors, therein reducing the number of clock cycles needed for the complete implementation of the algorithm. Thus this can be an efficient method for the calculation of FFT algorithms.
References
- Yuke Wang, Yiyan (Felix) Tang, Yingtao Jiang, Member, IEEE, Jin-Gyun Chung,Member, IEEE, Sang-Seob Song, Member, IEEE, and Myoung-Seob Lim, Member, IEEE "Novel Memory Reference Reduction Methods for FFT Implementations on DSP Processors"
- Yi-Pin Hsu and Shin-Yu Lin"Parallel-computing approach for FFT implementation on digital signal processor (DSP)"
- Mokhtar A. Aboleaze Dept. of Computer Science and Engineering York Toronto, ON. Canada Ayman I. Elnaggar Dept. of Electrical and Computer Engineering Sultan Qaboos University Muscat, Oman "Reducing Memory References for FFT Calculation".
- National Chiao Tung University, Yi-Pin Hsu and Shin-Yu Lin, "Implementation of Low-Memory Reference FFT on Digital Signal Processor".
- R.C.Agarwal, F.G.Gustavson, M.Zubair ,IBM T.J Watson Research Centre,Yorktown Hts,NY,proceedings of the 1994 conference on super computing,"A high performance algorithm for 1-D FFT".
- D. Takahashi, IEEE Signal Process. Lett., vol. 8, no. 5, pp. 145-147, May 2001"An extended split-radix FFT algorithm".
- M. T. Heideman, H. W. Johnson, and C. S. Burrus. Prime factor algorithms for Real 8211;valued series. In Proceedings of the IEEE International Conference on Acoustics, speech, and Signal Processing, page 28A.7.18211;4, San Diego, CA, March 1984.
- Editor: C. Sidney Burrus ,"Fast Fourier Transforms Collection".
- "TMS320C6000 Programmer's Guide, Texas Instruments.
- "TMS320C64x DSP Library Programmer's Reference (Rev. B)," Texas Instrument, Oct. 23, 2003, SPRU565A
Index Terms
Keywords