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DVCC based Readout Circuitry for Water Quality Monitoring System

by Pawan Whig, Syed Naseem Ahmad
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 49 - Number 22
Year of Publication: 2012
Authors: Pawan Whig, Syed Naseem Ahmad
10.5120/7900-1162

Pawan Whig, Syed Naseem Ahmad . DVCC based Readout Circuitry for Water Quality Monitoring System. International Journal of Computer Applications. 49, 22 ( July 2012), 1-7. DOI=10.5120/7900-1162

@article{ 10.5120/7900-1162,
author = { Pawan Whig, Syed Naseem Ahmad },
title = { DVCC based Readout Circuitry for Water Quality Monitoring System },
journal = { International Journal of Computer Applications },
issue_date = { July 2012 },
volume = { 49 },
number = { 22 },
month = { July },
year = { 2012 },
issn = { 0975-8887 },
pages = { 1-7 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume49/number22/7900-1162/ },
doi = { 10.5120/7900-1162 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T20:46:53.248548+05:30
%A Pawan Whig
%A Syed Naseem Ahmad
%T DVCC based Readout Circuitry for Water Quality Monitoring System
%J International Journal of Computer Applications
%@ 0975-8887
%V 49
%N 22
%P 1-7
%D 2012
%I Foundation of Computer Science (FCS), NY, USA
Abstract

A new configuration realizing water quality monitoring device using ISFET involving CMOS differential voltage current conveyor (DVCC) based low pass filter free from trans-conductance variation using Low-voltage PMOS bulk-driven cascade current mirror (P MOS BDCCM) current mirrors is proposed. The circuit uses four DVCCs as active elements and together with two capacitors and five resistors as passive elements, only one current mirror. The use of this active component makes the implementation simple and attractive. The functionality of the circuit is tested using Tanner simulator version 15 for a 70nm CMOS process model also the transfer function realization is done on MATLAB R2011a version, the Very high speed integrated circuit Hardware description language(VHDL) code for the same scheme is simulated on Xilinx ISE 10. 1 and various simulation results are obtained. Simulation results are included to demonstrate the results.

References
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Index Terms

Computer Science
Information Sciences

Keywords

Water quality monitoring Ion Sensitive Field Effect Transistor (ISFET) Differential Voltage Current Conveyor (DVCC)

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